Method and apparatus for optimizing distributed multiplexed bus interconnects
    1.
    发明授权
    Method and apparatus for optimizing distributed multiplexed bus interconnects 有权
    用于优化分布式多路复用总线互连的方法和装置

    公开(公告)号:US07412670B2

    公开(公告)日:2008-08-12

    申请号:US11096549

    申请日:2005-04-01

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5045

    摘要: Methods and apparatuses for optimizing distributed multiplexed bus interconnects are described. Parameters of components that make up a distributed multiplexed bus interconnect may be optimized, such as an amount of area on a chip occupied by the component, an amount of power consumed by the component, etc., while satisfying existing timing constraints between nodes of a distributed multiplexed bus interconnect.

    摘要翻译: 描述用于优化分布式多路复用总线互连的方法和装置。 构成分布式多路复用总线互连的组件的参数可以被优化,例如组件占用的芯片上的面积的量,组件消耗的功率量等,同时满足现有的定时约束 分布式多路复用总线互连。

    Various methods and apparatuses for flexible hierarchy grouping
    4.
    发明申请
    Various methods and apparatuses for flexible hierarchy grouping 审中-公开
    用于灵活层次分组的各种方法和装置

    公开(公告)号:US20060225015A1

    公开(公告)日:2006-10-05

    申请号:US11097027

    申请日:2005-03-31

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5072

    摘要: Methods and apparatuses are described for incorporating floor planning information into a configuration process by generating a definition of a floor plan grouping of interconnect components during a front-end view design process for the interconnect. Further, a user is permitted to combine components from separate IP block representations of interconnects during the front-end view design process, based upon physical location of the grouping of the components making up the interconnects on the chip.

    摘要翻译: 描述了用于将楼层规划信息结合到配置过程中的方法和装置,该方法和装置在用于互连的前端视图设计过程期间生成互连部件的平面图分组的定义。 此外,基于构成芯片上的互连的组件的分组的物理位置,允许用户在前端视图设计过程期间组合来自互连的单独的IP块表示。

    Method and apparatus for optimizing distributed multiplexed bus interconnects
    7.
    发明授权
    Method and apparatus for optimizing distributed multiplexed bus interconnects 有权
    用于优化分布式多路复用总线互连的方法和装置

    公开(公告)号:US06880133B2

    公开(公告)日:2005-04-12

    申请号:US10146989

    申请日:2002-05-15

    IPC分类号: G06F17/50 H01L21/82

    CPC分类号: G06F17/5045

    摘要: A method and apparatus for optimizing distributed multiplexed bus interconnects are described. The multiplexed bus interconnect contains one or more multiplexers to route signals through the bus interconnect. An amount of signaling wiring present within a distributed multiplexed bus interconnect is optimized by eliminating individual signaling wires based upon whether an Intellectual Property core connected to the multiplexed bus interconnect transmits or receives signals from the distributed multiplexed bus interconnect.

    摘要翻译: 描述了用于优化分布式多路复用总线互连的方法和装置。 多路复用的总线互连包含一个或多个多路复用器以通过总线互连路由信号。 通过基于连接到多路复用总线互连的知识产权核心是否从分布式多路复用总线互连传输或接收信号来消除单独的信令线来优化存在于分布式多路复用总线互连中的信令布线的量。