公开(公告)号：US20170090873A1

公开(公告)日：2017-03-30

申请号：US15276087

申请日：2016-09-26

申请人： Lawrence T. Clark ,  James Adams ,  Keith E. Holbert

发明人： Lawrence T. Clark ,  James Adams ,  Keith E. Holbert

IPC分类号： G06F7/58

CPC分类号： G06F7/588

摘要： This disclosure relates generally to physically unclonable function (PUF) circuitry along with methods of generating numbers. In one embodiment, the PUF circuitry includes a memory, a memory control circuitry, and whitening circuitry. To reduce or eliminate the systematic bias from the array, whitening circuitry is configured to generate a random number comprising random number bits in response to the memory control circuit implementing at least one sequence of memory cycles on the array of the memory cells in the memory. The whitening circuitry is configured to provide the random number bits of the random number based on the variable bit states stored by the array of the memory cells. On average the whitening circuitry is configured to provide approximately half of the random number bits in the first bit state and half of random number bits in a second bit state.

公开(公告)号：US10078494B2

公开(公告)日：2018-09-18

申请号：US15276087

申请日：2016-09-26

申请人： Lawrence T. Clark ,  James Adams ,  Keith E. Holbert

发明人： Lawrence T. Clark ,  James Adams ,  Keith E. Holbert

IPC分类号： G06F7/58

CPC分类号： G06F7/588

摘要： This disclosure relates generally to physically unclonable function (PUF) circuitry along with methods of generating numbers. In one embodiment, the PUF circuitry includes a memory, a memory control circuitry, and whitening circuitry. To reduce or eliminate the systematic bias from the array, whitening circuitry is configured to generate a random number comprising random number bits in response to the memory control circuit implementing at least one sequence of memory cycles on the array of the memory cells in the memory. The whitening circuitry is configured to provide the random number bits of the random number based on the variable bit states stored by the array of the memory cells. On average the whitening circuitry is configured to provide approximately half of the random number bits in the first bit state and half of random number bits in a second bit state.

公开(公告)号：US07649216B1

公开(公告)日：2010-01-19

申请号：US12117416

申请日：2008-05-08

申请人： Lawrence T. Clark ,  Karl C. Mohr ,  Keith E. Holbert

发明人： Lawrence T. Clark ,  Karl C. Mohr ,  Keith E. Holbert

IPC分类号： H01L27/10 ,  H01L29/73 ,  H01L29/739

CPC分类号： H01L27/088 ,  H01L23/552 ,  H01L25/0655 ,  H01L27/0207 ,  H01L2924/0002 ,  Y10S257/921 ,  H01L2924/00

摘要： The present invention relates to radiation hardening by design (RHBD), which employs layout and circuit techniques to mitigate the damaging effects of ionizing radiation. Reverse body biasing (RBB) of N-type metal-oxide-semiconductor (NMOS) transistors may be used to counteract the effects of trapped positive charges in isolation oxides due to ionizing radiation. In a traditional MOS integrated circuit, input/output (I/O) circuitry may be powered using an I/O power supply voltage, and core circuitry may be powered using a core power supply voltage, which is between the I/O power supply voltage and ground. However, in one embodiment of the present invention, the core circuitry is powered using a voltage difference between the core power supply voltage and the I/O power supply voltage. The bodies of NMOS transistors in the core circuitry are coupled to ground; therefore, a voltage difference between the core power supply voltage and ground provides RBB.

摘要翻译： 本发明涉及通过设计的辐射硬化（RHBD），其采用布局和电路技术来减轻电离辐射的破坏作用。 可以使用N型金属氧化物半导体（NMOS）晶体管的反向体偏置（RBB）来抵消由于电离辐射而在隔离氧化物中捕获的正电荷的影响。 在传统的MOS集成电路中，可以使用I / O电源电压对输入/输出（I / O）电路供电，并且核心电路可以使用核心电源电压供电，该电源电压位于I / O电源 电压和地面。 然而，在本发明的一个实施例中，核心电路使用核心电源电压和I / O电源电压之间的电压差来供电。 核心电路中的NMOS晶体管的主体耦合到地; 因此，核心电源电压和地之间的电压差提供RBB。