公开(公告)号：US07705840B2

公开(公告)日：2010-04-27

申请号：US11456596

申请日：2006-07-11

Applicant: Chun-Ching Wei ,  Hung-Hsiao Lin ,  Kun-Hong Chen ,  Yang-En Wu

Inventor： Chun-Ching Wei ,  Hung-Hsiao Lin ,  Kun-Hong Chen ,  Yang-En Wu

IPC: G06F3/038

CPC classification number: G09G3/3659 ,  G09G2300/0804 ,  G09G2300/0814

Abstract: Display panels capable of eliminating reliability issues due to high switching frequency. The display panel comprises a data driver outputting first, second, third and fourth data signals in sequence through a data line, a scan driver outputting first and second scan signals in sequence through first and second scan lines and an auxiliary driver generates first and second auxiliary signals in sequence, and first and second display cells commonly receives the first scan signal through the first scan line and receives the first and the second data signal through the data line, and a first switch is coupled to the data line and the second display cell, turning on and off in sequence according to the first auxiliary signal when the first scan signal is applied thereto such that the second and the first display cells receive the first and the second data signals in sequence.

Abstract translation: 显示面板能够消除由于高开关频率引起的可靠性问题。 显示面板包括通过数据线依次输出第一，第二，第三和第四数据信号的数据驱动器，扫描驱动器依次通过第一和第二扫描线输出第一和第二扫描信号，辅助驱动器产生第一和第二辅助 信号，第一和第二显示单元通常通过第一扫描线接收第一扫描信号，并通过数据线接收第一和第二数据信号，第一开关耦合到数据线和第二显示单元 ，当施加第一扫描信号时，根据第一辅助信号依次接通和断开，使得第二和第一显示单元依次接收第一和第二数据信号。

公开(公告)号：US20070039706A1

公开(公告)日：2007-02-22

申请号：US11438382

申请日：2006-05-22

Applicant: Kun-Hong Chen ,  Wen-Rei Guo

Inventor： Kun-Hong Chen ,  Wen-Rei Guo

IPC: D21F1/00

CPC classification number: G02F1/1345

Abstract: A fan-out wire structure is used to connect a driver and a display region of a display panel and has a plurality of first single-layer wires and at least one second single-layer wire. The first ends of the first single-layer wires are connected to the driver, and the second ends of the first single-layer wires are connected to the display area. The first end of the second single-layer wire is connected to the driver, and the second end of the second single-layer wire is connected to the display area. A metal layer of the first single-layer wires is different from a metal layer of the second single-layer wire.

Abstract translation: 使用扇形线结构来连接显示面板的驱动器和显示区域，并且具有多个第一单层电线和至少一个第二单层电线。 第一单层电线的第一端连接到驱动器，第一单层电线的第二端连接到显示区域。 第二单线的第一端连接到驱动器，第二单线的第二端连接到显示区。 第一单层布线的金属层与第二单层布线的金属层不同。

公开(公告)号：US20070023835A1

公开(公告)日：2007-02-01

申请号：US11470251

申请日：2006-09-05

Applicant: Kun-Hong Chen

Inventor： Kun-Hong Chen

IPC: H01L27/12

CPC classification number: H01L29/66742 ,  H01L29/78666

Abstract: An asymmetry thin-film transistor includes a substrate, a semiconductor layer positioned on the substrate, and a gate positioned on the substrate. The semiconductor layer has a channel region, a single lightly doped region and a first heavily doped region positioned at a side of the channel region, and a second heavily doped region positioned at the other side of the channel region. The semiconductor layer has a central line extending through the semiconductor layer and the substrate, the first heavily doped region and the second heavily doped region have equal lengths and are symmetric with respect to the central line of the semiconductor layer, and the gate is asymmetric with respect to the central line of the semiconductor layer. There is no lightly doped region in between the channel region and the second heavily doped region.

Abstract translation: 不对称薄膜晶体管包括衬底，位于衬底上的半导体层和位于衬底上的栅极。 半导体层具有沟道区，单个轻掺杂区和位于沟道区一侧的第一重掺杂区，以及位于沟道区另一侧的第二重掺杂区。 半导体层具有延伸穿过半导体层和衬底的中心线，第一重掺杂区域和第二重掺杂区域具有相等的长度并且相对于半导体层的中心线对称，并且栅极是不对称的 相对于半导体层的中心线。 在沟道区和第二重掺杂区之间不存在轻掺杂区。

公开(公告)号：US07132685B2

公开(公告)日：2006-11-07

申请号：US10463406

申请日：2003-06-18

Applicant: Kun-Hong Chen

Inventor： Kun-Hong Chen

IPC: H01L29/04

CPC classification number: H01L29/66742 ,  H01L29/78666

Abstract: An asymmetry thin-film transistor includes a substrate, a semiconductor layer and a gate positioned on the substrate. The semiconductor layer includes a first lightly doped region and a first heavily doped region adjacent to a first gate side, and a second lightly doped region together with a second heavily doped region adjacent to a second gate side. A first junction is between the first lightly doped region and the first heavily doped region. A second junction is between the second lightly doped region and the second heavily doped region. A distance between the first junction and the first gate side is unequal to a distance between the second junction and the second gate side.

Abstract translation: 不对称薄膜晶体管包括衬底，半导体层和位于衬底上的栅极。 半导体层包括与第一栅极侧相邻的第一轻掺杂区域和第一重掺杂区域以及与第二栅极侧邻近的第二重掺杂区域的第二轻掺杂区域。 第一结点在第一轻掺杂区和第一重掺杂区之间。 第二结点在第二轻掺杂区域和第二重掺杂区域之间。 第一结和第一栅极侧之间的距离不等于第二结和第二栅极侧之间的距离。

公开(公告)号：US07119777B2

公开(公告)日：2006-10-10

申请号：US10707110

申请日：2003-11-21

Applicant: Kun-Hong Chen

Inventor： Kun-Hong Chen

IPC: G09G3/36 ,  G09G3/10

CPC classification number: H01L27/1214 ,  G09G3/3233 ,  G09G2300/0842 ,  H01L27/1255 ,  H01L27/3244 ,  H01L29/78621 ,  H01L29/78627

Abstract: A pixel structure of active organic light emitting diode is disclosed, which comprises an organic light emitting diode, a data-line, a scan-line, a switch thin film transistor (TFT), a control TFT, and a capacitor. The switch TFT has a first lightly doping drain and the control TFT has a second lightly doping drain. The doped concentration of the second lightly doped drain region is higher than that of the first lightly doped drain region. The leakage current in the switch TFT is reduced and the kink effect in the control TFT is improved by the pixel structure of an active organic light emitting diode. Therefore, a better display performance is provided.

Abstract translation: 公开了一种有源有机发光二极管的像素结构，其包括有机发光二极管，数据线，扫描线，开关薄膜晶体管（TFT），控制TFT和电容器。 开关TFT具有第一轻掺杂漏极，并且控制TFT具有第二轻掺杂漏极。 第二轻掺杂漏极区的掺杂浓度高于第一轻掺杂漏极区的掺杂浓度。 开关TFT中的漏电流减小，并且通过有源有机发光二极管的像素结构改善控制TFT中的扭结效应。 因此，提供更好的显示性能。

公开(公告)号：US20050250230A1

公开(公告)日：2005-11-10

申请号：US11178940

申请日：2005-07-11

Applicant: Kun-Hong Chen

Inventor： Kun-Hong Chen

IPC: G09G3/32 ,  H01L21/336 ,  H01L21/77 ,  H01L27/12 ,  H01L27/15 ,  H01L27/32 ,  H01L29/786 ,  H01L31/0376 ,  H01L51/00

CPC classification number: H01L29/66757 ,  G09G3/3208 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/3244 ,  H01L29/78624

Abstract: The present invention discloses a control TFT structure (i.e. a driving TFT) for reducing leakage in an OLED display. A semiconductor layer, such as a polysilicon layer, is deposited on a transparent substrate as a channel region. A lightly doped region and a drain region are disposed on one side of the polysilicon layer and a source region is disposed on the opposite side of the polysilicon layer. An insulating layer is deposited covering the surface of the polysilicon layer, the lightly doped region, and the source/drain regions. Source and drain electrodes are disposed in the insulating layer, electrically connecting the source and drain region respectively. A gate metal layer is disposed on the insulating layer, at approximately the top right portion of the polysilicon layer to form a transistor structure.

公开(公告)号：US06960809B2

公开(公告)日：2005-11-01

申请号：US10907243

申请日：2005-03-25

Applicant: Kun-Hong Chen ,  Chinwei Hu

Inventor： Kun-Hong Chen ,  Chinwei Hu

IPC: H01L21/336 ,  H01L29/786

CPC classification number: H01L29/66757 ,  H01L29/78621 ,  H01L29/78675

Abstract: A polysilicon thin film transistor and a method of forming the same is provided. A poly-island layer is formed over a substrate. A gate insulation layer is formed over the poly-island layer. A gate is formed over the gate insulation layer. Using the gate as a mask, an ion implantation of the poly-island layer is carried out to form a source/drain region in the poly-island layer outside the channel region. An oxide layer and a silicon nitride layer, together serving as an inter-layer dielectric layer, are sequentially formed over the substrate. Thickness of the oxide layer is thicker than or the same as (thickness of the nitride layer multiplied by 9000 Å)1/2 and maximum thickness of the nitride layer is smaller than 1000 Å.

Abstract translation: 提供了多晶硅薄膜晶体管及其形成方法。 在基板上形成多岛层。 在多岛层上形成栅极绝缘层。 栅极形成在栅极绝缘层上。 使用栅极作为掩模，进行多岛层的离子注入，以在沟道区域外的多岛层中形成源极/漏极区域。 一起作为层间电介质层的氧化物层和氮化硅层依次形成在基板上。 氧化物层的厚度比（氮化物层的厚度乘以9000）的厚度大于或相同，并且氮化物层的最大厚度小于1000埃。

公开(公告)号：US20050151199A1

公开(公告)日：2005-07-14

申请号：US10907243

申请日：2005-03-25

Applicant: Kun-Hong Chen ,  Chinwei Hu

Inventor： Kun-Hong Chen ,  Chinwei Hu

IPC: H01L21/336 ,  H01L29/786 ,  H01L21/00 ,  H01L21/44 ,  H01L21/84 ,  H01L27/01 ,  H01L27/12 ,  H01L31/0392

CPC classification number: H01L29/66757 ,  H01L29/78621 ,  H01L29/78675

Abstract: A polysilicon thin film transistor and a method of forming the same is provided. A poly-island layer is formed over a substrate. A gate insulation layer is formed over the poly-island layer. A gate is formed over the gate insulation layer. Using the gate as a mask, an ion implantation of the poly-island layer is carried out to form a source/drain region in the poly-island layer outside the channel region. An oxide layer and a silicon nitride layer, together serving as an inter-layer dielectric layer, are sequentially formed over the substrate. Thickness of the oxide layer is thicker than or the same as (thickness of the nitride layer multiplied by 9000 Å)1/2 and maximum thickness of the nitride layer is smaller than 1000 Å.

Abstract translation: 提供了多晶硅薄膜晶体管及其形成方法。 在基板上形成多岛层。 在多岛层上形成栅极绝缘层。 栅极形成在栅极绝缘层上。 使用栅极作为掩模，进行多岛层的离子注入，以在沟道区域外的多岛层中形成源极/漏极区域。 一起作为层间电介质层的氧化物层和氮化硅层依次形成在基板上。 氧化物层的厚度比（氮化物层的厚度乘以9000）的厚度大于或相同，并且氮化物层的最大厚度小于1000埃。

公开(公告)号：US20050078071A1

公开(公告)日：2005-04-14

申请号：US10707110

申请日：2003-11-21

Applicant: Kun-Hong Chen

Inventor： Kun-Hong Chen

IPC: G09G3/32 ,  G09G3/36 ,  H01L21/77 ,  H01L27/12 ,  H01L27/13 ,  H01L27/32 ,  H01L29/786

CPC classification number: H01L27/1214 ,  G09G3/3233 ,  G09G2300/0842 ,  H01L27/1255 ,  H01L27/3244 ,  H01L29/78621 ,  H01L29/78627

Abstract: A pixel structure of active organic light emitting diode is disclosed, which comprises an organic light emitting diode, a data-line, a scan-line, a switch thin film transistor (TFT), a control TFT, and a capacitor. The switch TFT has a first lightly doping drain and the control TFT has a second lightly doping drain. The doped concentration of the second lightly doped drain region is higher than that of the first lightly doped drain region. The leakage current in the switch TFT is reduced and the kink effect in the control TFT is improved by the pixel structure of an active organic light emitting diode. Therefore, a better display performance is provided.

Abstract translation: 公开了一种有源有机发光二极管的像素结构，其包括有机发光二极管，数据线，扫描线，开关薄膜晶体管（TFT），控制TFT和电容器。 开关TFT具有第一轻掺杂漏极，并且控制TFT具有第二轻掺杂漏极。 第二轻掺杂漏极区的掺杂浓度高于第一轻掺杂漏极区的掺杂浓度。 开关TFT中的漏电流减小，并且通过有源有机发光二极管的像素结构改善控制TFT中的扭结效应。 因此，提供更好的显示性能。

公开(公告)号：US20050036092A1

公开(公告)日：2005-02-17

申请号：US10800592

申请日：2004-03-15

Applicant: Kuang-Chao Yeh ,  Kun-Hong Chen

Inventor： Kuang-Chao Yeh ,  Kun-Hong Chen

IPC: G02F1/1362 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  G02F1/1343

CPC classification number: G02F1/136227 ,  H01L27/12 ,  H01L27/1244 ,  H01L27/1248

Abstract: A thin-film transistor liquid crystal display (TFT-LCD) substrate mainly includes a substrate and a planarization layer thereon. The substrate is defined to form a thin-film transistor (TFT) and a contact plug thereon and the source/drain of the TFT is electrically coupled with the contact plug. The planarization layer is disposed on the substrate and the planarization layer has a via hole for penetrating the planarization layer to expose to the contact plug. The configuration of the cross-section of the via hole includes a straight edge so that the via hole is able to be formed with a less steep taper at a lateral view by reflow.

Abstract translation: 薄膜晶体管液晶显示器（TFT-LCD）基板主要包括基板和平坦化层。 衬底限定为在其上形成薄膜晶体管（TFT）和接触插头，并且TFT的源极/漏极与接触插塞电耦合。 平坦化层设置在基板上，平坦化层具有用于穿透平坦化层以暴露于接触插塞的通孔。 通孔的横截面的构造包括直边缘，使得通孔能够通过回流在侧视图中形成具有较不陡峭的锥度。