公开(公告)号：US07948480B2

公开(公告)日：2011-05-24

申请号：US11652607

申请日：2007-01-12

申请人： Makoto Mizuki ,  Tetsuro Omori ,  Hiroshi Kojima

发明人： Makoto Mizuki ,  Tetsuro Omori ,  Hiroshi Kojima

IPC分类号： G09G5/00

CPC分类号： G09G3/3283 ,  G09G3/2011 ,  G11C27/028

摘要： A current driving circuit includes: a reference input terminal to which a first reference current is given; a current mirror circuit for receiving the first reference current and outputting a first internal current corresponding to the first reference current; a bias voltage generation section for receiving the first internal current and generating a bias voltage corresponding to the first internal current; an output reference current generation section for receiving the bias voltage and generating a second reference current corresponding to the bias voltage; a reference current output terminal for outputting the second reference current; an internal current generation transistor for receiving at a gate thereof the bias voltage and generating a second internal current corresponding to the bias voltage; and an output current generation section for receiving the second internal current and generating n output currents corresponding to the second internal current.

摘要翻译： 电流驱动电路包括：给定第一参考电流的参考输入端; 电流镜电路，用于接收第一参考电流并输出对应于第一参考电流的第一内部电流; 偏置电压产生部分，用于接收第一内部电流并产生对应于第一内部电流的偏置电压; 输出参考电流产生部分，用于接收所述偏置电压并产生对应于所述偏置电压的第二参考电流; 用于输出第二参考电流的参考电流输出端; 内部电流产生晶体管，用于在其栅极处接收所述偏置电压并产生对应于所述偏置电压的第二内部电流; 以及输出电流产生部分，用于接收第二内部电流并产生对应于第二内部电流的n个输出电流。

公开(公告)号：US20090289703A1

公开(公告)日：2009-11-26

申请号：US12435880

申请日：2009-05-05

申请人： Tomokazu Kojima ,  Makoto Mizuki

发明人： Tomokazu Kojima ,  Makoto Mizuki

IPC分类号： H03F1/02 ,  H03L5/00

CPC分类号： G09G3/20 ,  G09G3/32 ,  G09G2310/0275 ,  G09G2320/02 ,  H03F3/005 ,  H03F3/45183 ,  H03F3/45188 ,  H03F3/45753 ,  H03F2203/45212 ,  H03F2203/45366 ,  H03F2203/45512 ,  H03F2203/45514 ,  H03F2203/45534 ,  H03F2203/45536 ,  H03F2203/45618 ,  H03F2203/45631 ,  H03F2203/45651 ,  H03F2203/45726 ,  H03F2203/45728

摘要： In an offset cancellation circuit according to the present invention, a first capacitance is connected to a gate of a first transistor of a first active load, and a second capacitance is connected to a gate of a second transistor of the first active load. A switch sets a first time period and a second time period in connection states between the first and second transistors and the first and second capacitances. The connection states between the first and second transistors and the first and second capacitances are set so that a gate voltage of the first transistor is supplied to the first capacitance, and a gate voltage of the second transistor is supplied to the second capacitance during the first time period; and so that the first and second capacitances can retain charges, and the second time period becomes an output time period of the operational amplifier during the second time period.

摘要翻译： 在根据本发明的偏移消除电路中，第一电容连接到第一有源负载的第一晶体管的栅极，并且第二电容连接到第一有源负载的第二晶体管的栅极。 开关设置第一和第二晶体管与第一和第二电容之间的连接状态的第一时间段和第二时间段。 将第一和第二晶体管与第一和第二电容之间的连接状态设置为使得第一晶体管的栅极电压被提供给第一电容，并且第一晶体管的栅极电压在第一晶体管的栅极电压被提供给第二电容 时间段; 并且使得第一和第二电容可以保持电荷，并且第二时间段成为第二时间段期间运算放大器的输出时间段。

公开(公告)号：US20080309649A1

公开(公告)日：2008-12-18

申请号：US12135627

申请日：2008-06-09

申请人： Hiroshi Kojima ,  Makoto Mizuki ,  Munehiko Ogawa ,  Kazuyoshi Nishi ,  Tetsuro Oomori

发明人： Hiroshi Kojima ,  Makoto Mizuki ,  Munehiko Ogawa ,  Kazuyoshi Nishi ,  Tetsuro Oomori

IPC分类号： G06F3/038 ,  H03B1/00

CPC分类号： G09G3/3283 ,  G09G3/22 ,  G09G2310/0248 ,  G09G2330/04

摘要： A current drive circuit supplies a driving current to a pixel portion included in a current-driven display panel. A driving current generator includes an output terminal for supplying the driving current. A protective transistor has a drain connected to the pixel portion, a source connected to the output terminal, and a gate to which a first bias voltage is supplied. The first bias voltage has a voltage level lower than or equal to a voltage level obtained by adding the threshold voltage of the protective transistor to the breakdown voltage of the driving current generator.

摘要翻译： 电流驱动电路将驱动电流供给到电流驱动显示面板中的像素部。 驱动电流发生器包括用于提供驱动电流的输出端子。 保护晶体管具有连接到像素部分的漏极，连接到输出端子的源极和提供第一偏置电压的栅极。 第一偏置电压具有低于或等于通过将保护晶体管的阈值电压与驱动电流发生器的击穿电压相加而获得的电压电平的电压电平。

公开(公告)号：US07365594B2

公开(公告)日：2008-04-29

申请号：US11313958

申请日：2005-12-22

申请人： Hiroshi Kojima ,  Tetsuro Omori ,  Makoto Mizuki ,  Yasuhiro Hirokane ,  Hiroshi Kondo

发明人： Hiroshi Kojima ,  Tetsuro Omori ,  Makoto Mizuki ,  Yasuhiro Hirokane ,  Hiroshi Kondo

IPC分类号： G05F1/10 ,  G05F3/02

CPC分类号： G09G3/3283 ,  G09G3/3225 ,  G09G2320/0233

摘要： A current driver includes a gate line having a first and second nodes, K driving transistors, a terminal and a voltage generation section. The terminal receives a first current. The voltage generation section generates a bias voltage according to a current value of the first current. The gate line receives, at one of the first and second nodes, the bias voltage generated by the voltage generation section. Gates of the K transistors are connected between the first and second nodes of the gate line. In the voltage generation section, the relationship between the first current and the bias voltage is adjusted in the first mode, according to a current value of an output current flowing in a first driving transistor of the K driving transistors, and in the second mode, according to a current value of an output current flowing in a second driving transistor of the K driving transistors.

摘要翻译： 电流驱动器包括具有第一和第二节点的栅极线，K个驱动晶体管，一个端子和一个电压产生部分。 终端接收第一电流。 电压产生部根据第一电流的电流值生成偏置电压。 栅极线在第一和第二节点中的一个处接收由电压产生部分产生的偏置电压。 K晶体管的栅极连接在栅极线的第一和第二节点之间。 在电压产生部分中，根据在K个驱动晶体管的第一驱动晶体管中流过的输出电流的电流值，在第一模式中调节第一电流和偏置电压之间的关系，在第二模式中， 根据在K个驱动晶体管的第二驱动晶体管中流动的输出电流的电流值。

公开(公告)号：US20060132180A1

公开(公告)日：2006-06-22

申请号：US11302338

申请日：2005-12-14

申请人： Tetsuro Omori ,  Hiroshi Kojima ,  Makoto Mizuki

发明人： Tetsuro Omori ,  Hiroshi Kojima ,  Makoto Mizuki

IPC分类号： H03K19/0175

CPC分类号： G09G3/3283 ,  G09G2320/0233 ,  H03F3/345 ,  H03F3/45179 ,  H03F3/45475

摘要： In a current driver, a gate of a first generating transistor, gates of K driving transistors, and a gate of a second generating transistor are connected to a gate line in this order. A first differential amplifier outputs a voltage determined according to the difference between a voltage from a first supply node and a voltage at the drain of the first generating transistor. A second differential amplifier outputs a voltage determined according to the difference between a voltage from a second supply node and a voltage at the drain of the second generating transistor. The gate of the first generating transistor receives the output of the first differential amplifier. The gate of the second generating transistor receives the output of the second differential amplifier.

摘要翻译： 在电流驱动器中，第一产生晶体管的栅极，K个驱动晶体管的栅极和第二个生成晶体管的栅极依次连接到栅极线。 第一差分放大器输出根据来自第一电源节点的电压和第一发电晶体管的漏极处的电压之间的差确定的电压。 第二差分放大器输出根据来自第二电源节点的电压和第二发生晶体管的漏极处的电压之间的差确定的电压。 第一发生晶体管的栅极接收第一差分放大器的输出。 第二发生晶体管的栅极接收第二差分放大器的输出。

公开(公告)号：US06958742B2

公开(公告)日：2005-10-25

申请号：US10795390

申请日：2004-03-09

申请人： Yoshito Date ,  Tetsuro Omori ,  Makoto Mizuki

发明人： Yoshito Date ,  Tetsuro Omori ,  Makoto Mizuki

IPC分类号： H01L51/50 ,  G05F3/26 ,  G09G3/20 ,  G09G3/30 ,  G09G3/32 ,  H03F3/343 ,  G09G3/36

CPC分类号： G09G3/3283 ,  G05F3/262 ,  G09G3/3241 ,  G09G2310/027 ,  G09G2320/0209

摘要： In a current drive system for current-driving a display panel such as an organic EL panel, display crosstalk caused by a bias-voltage variation due to induction from the display panel is prevented. For this prevention, the current drive system includes: a plurality of drivers for current-driving a plurality of display element circuits in the display panel; and a bias circuit with a low output impedance for generating a bias voltage and supplying the bias voltage to each of the drivers through a bias line. The output impedance of the bias circuit is set sufficiently low so that a voltage variation caused on the bias line due to switching operation of each switch in the drivers converges within a period during which display data is written.

摘要翻译： 在用于电流驱动诸如有机EL面板的显示面板的电流驱动系统中，防止由于从显示面板的感应而产生的偏置电压变化引起的显示串扰。 为了防止这种情况，当前的驱动系统包括：用于在显示面板中电流驱动多个显示元件电路的多个驱动器; 以及具有低输出阻抗的偏置电路，用于产生偏置电压，并通过偏置线将偏置电压提供给每个驱动器。 偏置电路的输出阻抗被设置得足够低，使得由于驱动器中的每个开关的切换操作而在偏置线上引起的电压变化在写入显示数据的时段内收敛。

公开(公告)号：US07859490B2

公开(公告)日：2010-12-28

申请号：US11652140

申请日：2007-01-11

申请人： Tetsuro Oomori ,  Hisao Kunitani ,  Hiroshi Kojima ,  Makoto Mizuki ,  Noriko Kaku

发明人： Tetsuro Oomori ,  Hisao Kunitani ,  Hiroshi Kojima ,  Makoto Mizuki ,  Noriko Kaku

IPC分类号： G09G3/30

CPC分类号： G09G3/3283

摘要： The current drive device of the present invention includes: a current source transistor for allowing a preset drive current to flow to a drain; a cascode transistor cascode-connected to the current source transistor; a switch circuit for switching ON/OFF flow of the drive current through the drain of the cascode transistor and a circuit to be driven; and a bypass circuit for allowing the drive current to flow therethrough to bypass the switch circuit and the circuit to be driven when the switch circuit is OFF.

摘要翻译： 本发明的电流驱动装置包括：用于允许预设驱动电流流到漏极的电流源晶体管; 共模共轭共栅型连接到电流源晶体管的共源共栅晶体管; 用于切换驱动电流的通/断流通过共源共栅晶体管的漏极和被驱动的电路的开关电路; 以及旁路电路，用于当开关电路断开时允许驱动电流流过其旁路开关电路和待驱动的电路。

公开(公告)号：US07795961B2

公开(公告)日：2010-09-14

申请号：US12435880

申请日：2009-05-05

申请人： Tomokazu Kojima ,  Makoto Mizuki

发明人： Tomokazu Kojima ,  Makoto Mizuki

IPC分类号： H03F1/02

CPC分类号： G09G3/20 ,  G09G3/32 ,  G09G2310/0275 ,  G09G2320/02 ,  H03F3/005 ,  H03F3/45183 ,  H03F3/45188 ,  H03F3/45753 ,  H03F2203/45212 ,  H03F2203/45366 ,  H03F2203/45512 ,  H03F2203/45514 ,  H03F2203/45534 ,  H03F2203/45536 ,  H03F2203/45618 ,  H03F2203/45631 ,  H03F2203/45651 ,  H03F2203/45726 ,  H03F2203/45728

摘要： In an offset cancellation circuit according to the present invention, a first capacitance is connected to a gate of a first transistor of a first active load, and a second capacitance is connected to a gate of a second transistor of the first active load. A switch sets a first time period and a second time period in connection states between the first and second transistors and the first and second capacitances. The connection states between the first and second transistors and the first and second capacitances are set so that a gate voltage of the first transistor is supplied to the first capacitance, and a gate voltage of the second transistor is supplied to the second capacitance during the first time period; and so that the first and second capacitances can retain charges, and the second time period becomes an output time period of the operational amplifier during the second time period.

摘要翻译： 在根据本发明的偏移消除电路中，第一电容连接到第一有源负载的第一晶体管的栅极，并且第二电容连接到第一有源负载的第二晶体管的栅极。 开关设置第一和第二晶体管与第一和第二电容之间的连接状态的第一时间段和第二时间段。 将第一和第二晶体管与第一和第二电容之间的连接状态设置为使得第一晶体管的栅极电压被提供给第一电容，并且第一晶体管的栅极电压在第一晶体管的栅极电压被提供给第二电容 时间段; 并且使得第一和第二电容可以保持电荷，并且第二时间段成为第二时间段期间运算放大器的输出时间段。

公开(公告)号：US07649528B2

公开(公告)日：2010-01-19

申请号：US11401399

申请日：2006-04-11

申请人： Yoshito Date ,  Tetsuro Omori ,  Shiro Dosho ,  Makoto Mizuki

发明人： Yoshito Date ,  Tetsuro Omori ,  Shiro Dosho ,  Makoto Mizuki

IPC分类号： G09G5/00

CPC分类号： G09G3/3283 ,  G09G3/3241 ,  G09G2310/027 ,  G09G2320/0233 ,  G09G2330/028

摘要： The first and second chips are provided side by side. The first chip includes: a current supply section for outputting a drive current, the current supply section including a current mirror; a current distribution MISFET; a current input MISFET for transmitting an electric current to the current supply section, the current input MISFET being connected to the current distribution MISFET; and a second current distribution MISFET. The current distribution MISFET and the second current distribution MISFET constitute a current mirror. The second chip includes a second current input MISFET which is connected to the second current distribution MISFET. The ratio between the W/L ratio of the current distribution MISFET and the W/L ratio of the current input MISFET connected thereto is the same in the first and second chips.

摘要翻译： 第一和第二芯片并排设置。 第一芯片包括：电流供应部分，用于输出驱动电流;电流供应部分包括电流镜; 电流分布MISFET; 电流输入MISFET，用于将电流传输到电流供应部分，电流输入MISFET连接到电流分布MISFET; 和第二电流分布MISFET。 电流分布MISFET和第二电流分布MISFET构成电流镜。 第二芯片包括连接到第二电流分布MISFET的第二电流输入MISFET。 电流分布MISFET的W / L比与与其连接的电流输入MISFET的W / L比之间的比率在第一和第二芯片中是相同的。

公开(公告)号：US07477094B2

公开(公告)日：2009-01-13

申请号：US10797245

申请日：2004-03-11

申请人： Yoshito Date ,  Tetsurou Oomori ,  Makoto Mizuki ,  Shiro Dosho

发明人： Yoshito Date ,  Tetsurou Oomori ,  Makoto Mizuki ,  Shiro Dosho

IPC分类号： G05F1/10

CPC分类号： G09G3/3241 ,  G05F3/262 ,  G09G3/3283 ,  G09G2320/0209

摘要： A current driving device includes a reference current source, a first MISFET connected to the reference current source, a plurality of current distribution MISFETs which constitutes a current mirror together with the first MISFET and distributes a reference current, a current input MISFET connected to the current distribution MISFETs, and a plurality of current supply sections each of which includes MISFETs constituting a current mirror circuit together with the current input MISFET and supplies a driving current for a pixel circuit. With the plurality of current distribution MISFETs provided, change in gate the potential of MISFETs in the current supply section can be suppressed, so that the generation of a crosstalk in a display device can be suppressed.

摘要翻译： 电流驱动装置包括参考电流源，连接到参考电流源的第一MISFET，与第一MISFET一起构成电流镜的多个电流分布MISFET，并分配参考电流，连接到电流的电流输入MISFET 分配MISFET和多个电流供应部分，每个电流部分包括与电流输入MISFET一起构成电流镜电路的MISFET，并且为像素电路提供驱动电流。 利用提供的多个电流分布MISFET，可以抑制电流供应部中的MISFET的电位的变化，从而可以抑制显示装置中的串扰的产生。