公开(公告)号：US08563366B2

公开(公告)日：2013-10-22

申请号：US13407359

申请日：2012-02-28

申请人： Dipankar Pramanik ,  Tony P. Chiang ,  Mankoo Lee

发明人： Dipankar Pramanik ,  Tony P. Chiang ,  Mankoo Lee

IPC分类号： H01L29/8605

CPC分类号： H01L45/14 ,  G11C13/0002 ,  G11C13/0007 ,  G11C13/003 ,  G11C13/004 ,  G11C13/0069 ,  G11C2013/0045 ,  G11C2013/0073 ,  G11C2013/0078 ,  G11C2013/0092 ,  G11C2213/76 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/10 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/16

摘要： A resistor structure incorporated into a resistive switching memory cell or device to form memory devices with improved device performance and lifetime is provided. The resistor structure may be a two-terminal structure designed to reduce the maximum current flowing through a memory device. A method is also provided for making such memory device. The method includes depositing a resistor structure and depositing a variable resistance layer of a resistive switching memory cell of the memory device, where the resistor structure is disposed in series with the variable resistance layer to limit the switching current of the memory device. The incorporation of the resistor structure is very useful in obtaining desirable levels of device switching currents that meet the switching specification of various types of memory devices. The memory devices may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices.

公开(公告)号：US20130224928A1

公开(公告)日：2013-08-29

申请号：US13407359

申请日：2012-02-28

申请人： Dipankar Pramanik ,  Tony P. Chiang ,  Mankoo Lee

发明人： Dipankar Pramanik ,  Tony P. Chiang ,  Mankoo Lee

IPC分类号： H01L21/02

CPC分类号： H01L45/14 ,  G11C13/0002 ,  G11C13/0007 ,  G11C13/003 ,  G11C13/004 ,  G11C13/0069 ,  G11C2013/0045 ,  G11C2013/0073 ,  G11C2013/0078 ,  G11C2013/0092 ,  G11C2213/76 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/10 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/16

摘要： A resistor structure incorporated into a resistive switching memory cell or device to form memory devices with improved device performance and lifetime is provided. The resistor structure may be a two-terminal structure designed to reduce the maximum current flowing through a memory device. A method is also provided for making such memory device. The method includes depositing a resistor structure and depositing a variable resistance layer of a resistive switching memory cell of the memory device, where the resistor structure is disposed in series with the variable resistance layer to limit the switching current of the memory device. The incorporation of the resistor structure is very useful in obtaining desirable levels of device switching currents that meet the switching specification of various types of memory devices. The memory devices may be formed as part of a high-capacity nonvolatile memory integrated circuit, which can be used in various electronic devices.

摘要翻译： 提供了并入电阻式开关存储单元或装置中以形成具有改进的器件性能和寿命的存储器件的电阻器结构。 电阻器结构可以是设计成减小流过存储器件的最大电流的两端结构。 还提供了一种用于制造这种存储器件的方法。 该方法包括沉积电阻器结构并沉积存储器件的电阻式开关存储单元的可变电阻层，其中电阻器结构与可变电阻层串联设置以限制存储器件的开关电流。 电阻器结构的结合对于获得满足各种类型的存储器件的开关规范的期望的器件开关电流水平是非常有用的。 存储器件可以形成为可用于各种电子器件的大容量非易失性存储器集成电路的一部分。

公开(公告)号：US06396107B1

公开(公告)日：2002-05-28

申请号：US09716749

申请日：2000-11-20

申请人： Ciaran J. Brennan ,  Douglas B. Hershberger ,  Mankoo Lee ,  Nicholas T. Schmidt ,  Steven H. Voldman

发明人： Ciaran J. Brennan ,  Douglas B. Hershberger ,  Mankoo Lee ,  Nicholas T. Schmidt ,  Steven H. Voldman

IPC分类号： H01L2362

CPC分类号： H01L27/0259 ,  H01L27/0255 ,  H01L2924/0002 ,  H01L2924/00

摘要： A silicon-germanium ESD element comprises a substrate of a first dopant type coupled to a first voltage terminal and a first diode-configured element. The first diode-configured element has a collector region of a second dopant type in the substrate, a SiGe base layer of the first dopant type on the collector region, with the SiGe base layer including a base contact region, and an emitter of the second dopant type on the SiGe base layer. Preferably, the SiGe base layer ion the collector region is an epitaxial SiGe layer and the second dopant type of the emitter is diffused in to the SiGe base layer. The ESD element of the present invention may further include a second diode-configured element of the same structure as the first diode-configured element, with an isolation region in the substrate separating the first and second diode-configured elements. The first and second diode-configured elements form a diode network. In each of the embodiments, the isolation regions may be disposed adjacent the collector regions of the diode elements and below a portion of the SiGe base layer of the diode elements. The SiGe base layer in the diode elements preferably comprises an active, single crystal layer in a portion directly over the collector region and a polycrystalline layer in portions directly over the isolation regions. The isolation regions may be shallow or deep trench isolations.

摘要翻译： 硅锗ESD元件包括耦合到第一电压端子和第一二极管配置元件的第一掺杂剂类型的衬底。 第一二极管配置元件在衬底中具有第二掺杂剂类型的集电极区域，在集电极区域上具有第一掺杂剂类型的SiGe基极层，SiGe基极层包括基极接触区域，第二掺杂剂的发射极 掺杂剂类型在SiGe基层上。 优选地，SiGe基极层离子集电极区域是外延SiGe层，并且第二掺杂剂类型的发射极扩散到SiGe基极层中。 本发明的ESD元件还可以包括与第一二极管配置元件相同结构的第二二极管配置元件，衬底中的隔离区域分隔第一和第二二极管配置元件。 第一和第二二极管配置元件形成二极管网络。 在每个实施例中，隔离区可以邻近二极管元件的集电极区域并且位于二极管元件的SiGe基极层的一部分附近。 二极管元件中的SiGe基极层优选地包括直接在集电极区域上的部分中的有源单晶层和直接在隔离区上的部分的多晶层。 隔离区可以是浅沟或深沟隔离。