公开(公告)号：US20170117432A1

公开(公告)日：2017-04-27

申请号：US15280247

申请日：2016-09-29

申请人： Mark Scott Bailly

发明人： Mark Scott Bailly

IPC分类号： H01L31/18 ,  H01L31/068 ,  H01L31/0216 ,  H01L31/0224 ,  H01L31/028

CPC分类号： H01L31/1804 ,  H01L31/02167 ,  H01L31/022425 ,  H01L31/022441 ,  H01L31/02363 ,  H01L31/028 ,  H01L31/0682 ,  Y02E10/547

摘要： In accordance with embodiments disclosed herein, there are provided methods and systems for implementing damage-and-resist-free laser patterning of dielectric films on textured silicon. For example, in one embodiment, such means include means for depositing a Silicon nitride (SiNx) or SiOx (silicon oxide) layer onto a crystalline silicon (c-Si) substrate by a Plasma Enhanced Chemical Vapor Deposition (PECVD) processing; depositing an amorphous silicon (a-Si) film on top of the SiNx or SiOx layer; patterning the a-Si film to define an etch mask for the SiNx or SiOx layer; removing the SiNx or SiOx layer via a Buffered Oxide Etch (BOE) chemical etch to expose the c-Si surface; removing the a-Si mask with a hydrogen plasma etch in a PECVD tool to prevent current loss from the mask; and plating the exposed c-Si surface with metal contacts. Other related embodiments are disclosed.

公开(公告)号：US09735310B2

公开(公告)日：2017-08-15

申请号：US15280247

申请日：2016-09-29

申请人： Mark Scott Bailly

发明人： Mark Scott Bailly

IPC分类号： H01L31/0224 ,  H01L21/283 ,  H01L31/18 ,  H01L31/028 ,  H01L31/0216 ,  H01L31/068

CPC分类号： H01L31/1804 ,  H01L31/02167 ,  H01L31/022425 ,  H01L31/022441 ,  H01L31/02363 ,  H01L31/028 ,  H01L31/0682 ,  Y02E10/547

摘要： In accordance with embodiments disclosed herein, there are provided methods and systems for implementing damage-and-resist-free laser patterning of dielectric films on textured silicon. For example, in one embodiment, such means include means for depositing a Silicon nitride (SiNx) or SiOx (silicon oxide) layer onto a crystalline silicon (c-Si) substrate by a Plasma Enhanced Chemical Vapor Deposition (PECVD) processing; depositing an amorphous silicon (a-Si) film on top of the SiNx or SiOx layer; patterning the a-Si film to define an etch mask for the SiNx or SiOx layer; removing the SiNx or SiOx layer via a Buffered Oxide Etch (BOE) chemical etch to expose the c-Si surface; removing the a-Si mask with a hydrogen plasma etch in a PECVD tool to prevent current loss from the mask; and plating the exposed c-Si surface with metal contacts. Other related embodiments are disclosed.