Sample and hold circuit and active pixel sensor array sampling system utilizing same
    1.
    发明授权
    Sample and hold circuit and active pixel sensor array sampling system utilizing same 有权
    采样保持电路和有源像素传感器阵列采样系统

    公开(公告)号:US07388608B2

    公开(公告)日:2008-06-17

    申请号:US10798979

    申请日:2004-03-11

    CPC classification number: H04N5/3658 H04N5/3575 H04N5/378

    Abstract: An active pixel sensor array sampling system includes a plurality of video circuits and reset circuits. A video circuit generates a video voltage from each one of the pixels of a column of pixels. An associated reset circuit generates a reset voltage for each of the pixels of a column of pixels. The video circuits and the reset circuits are closed loop sample and hold circuits. The active pixel sensor array is integrated on an integrated circuit.

    Abstract translation: 有源像素传感器阵列采样系统包括多个视频电路和复位电路。 视频电路从像素列的每个像素生成视频电压。 相关联的复位电路为像素列的每个像素生成复位电压。 视频电路和复位电路是闭环采样和保持电路。 有源像素传感器阵列集成在集成电路上。

    Analog vertical sub-sampling in an active pixel sensor (APS) image sensor
    2.
    发明授权
    Analog vertical sub-sampling in an active pixel sensor (APS) image sensor 有权
    有源像素传感器(APS)图像传感器中的模拟垂直子采样

    公开(公告)号:US07342212B2

    公开(公告)日:2008-03-11

    申请号:US11395193

    申请日:2006-03-31

    CPC classification number: H04N9/045 H04N5/374 H04N5/378

    Abstract: An active pixel sensor (APS) image sensor comprises an array of pixel circuits corresponding to rows and columns of pixels, a plurality of amplifiers that buffer signals output by the array of pixel circuits, and a plurality of sample and hold circuits that read the buffered signals. A routing mechanism is positioned between the array of pixel circuits and the plurality of amplifiers. A controller selects a set of the pixel circuits for sampling and is configured to control the routing mechanism to couple each pixel circuit in the set to a different one of the amplifiers during a normal mode of operation and to couple each pixel circuit of a subset of pixel circuits in a first set of pixel circuits to a different amplifier of a first subset of the amplifiers, to couple each pixel circuit of a subset of pixel circuits in a second set of pixel circuits to a different amplifier of a second subset of the amplifiers, and to connect the amplifiers of the first and second subsets of amplifiers in pairs to a common one of the sample and hold circuits during a sub-sampling mode of operation.

    Abstract translation: 有源像素传感器(APS)图像传感器包括对应于像素行和列的像素电路阵列,缓冲由像素电路阵列输出的信号的多个放大器以及读取缓冲的多个采样和保持电路 信号。 路由机制位于像素电路阵列和多个放大器之间。 控制器选择一组用于采样的像素电路,并且被配置为控制路由机制以在正常操作模式期间将集合中的每个像素电路耦合到不同的一个放大器,并且将 将第一组像素电路中的像素电路连接到放大器的第一子集的不同放大器,以将第二组像素电路中的像素电路的子集的每个像素电路耦合到放大器的第二子集的不同放大器 并且在子采样操作模式期间将放大器的第一和第二子集的放大器成对连接到采样和保持电路中的公共一个。

    METHOD AND APPARATUS FOR OPTIMIZING IMAGE SENSOR NOISE AND DYNAMIC RANGE
    3.
    发明申请
    METHOD AND APPARATUS FOR OPTIMIZING IMAGE SENSOR NOISE AND DYNAMIC RANGE 审中-公开
    用于优化图像传感器噪声和动态范围的方法和装置

    公开(公告)号:US20090086086A1

    公开(公告)日:2009-04-02

    申请号:US12252565

    申请日:2008-10-16

    CPC classification number: H04N5/3698 H04N5/235 H04N5/2351 H04N5/374

    Abstract: A method and apparatus for optimizing the voltage supply of an image sensor pixel array to minimize pixel noise and maximize dynamic range is disclosed. The voltage supply is adjusted in response to the exposure level of the pixel array when it captures an image. The voltage supply is increased in higher exposure levels to expand the dynamic range of the pixel array. In lower exposure levels, when the full dynamic range of the pixel array is not utilized, the voltage supply is decreased to lower pixel noise level and reduce its effect on image quality.

    Abstract translation: 公开了一种用于优化图像传感器像素阵列的电压供应以最小化像素噪声并最大化动态范围的方法和装置。 当捕获图像时,响应于像素阵列的曝光水平来调整电压源。 在更高的曝光水平下,电压供应增加,以扩大像素阵列的动态范围。 在较低的曝光水平下,当不利用像素阵列的全动态范围时,电压降低到较低的像素噪声水平,并降低其对图像质量的影响。

    Circuit for an active pixel
    4.
    发明授权
    Circuit for an active pixel 有权
    有源像素的电路

    公开(公告)号:US07973847B2

    公开(公告)日:2011-07-05

    申请号:US12061806

    申请日:2008-04-03

    CPC classification number: H01L27/14643 H04N5/376

    Abstract: A pixel circuit includes a pixel-capture device having a pixel node and operable to convert light intensity into a pixel signal at the pixel node, the pixel signal representing a captured pixel. A row node carries a row signal that is operable to both (a) enable passage of the pixel signal from the pixel node to a column node during a readout phase of the captured pixel, and (b) set the pixel node to a predetermined signal level during a reset phase of the captured pixel. The reset phase and the readout phase are configured to occur during different time intervals. A reset node is included for carrying a reset signal that is operable together with the row signal to (a) enable passage from the pixel node to the column node during the readout phase, and (b) set the pixel node to predetermined signal level during the reset phase.

    Abstract translation: 像素电路包括具有像素节点并且可操作以将光强转换为像素节点处的像素信号的像素捕获装置,该像素信号表示捕获的像素。 行节点携带行信号,其可操作以(a)在捕获的像素的读出阶段期间能够使像素信号从像素节点传递到列节点,并且(b)将像素节点设置为预定信号 在捕获的像素的复位阶段期间。 复位阶段和读出阶段被配置为在不同的时间间隔期间发生。 包括复位节点,用于携带与行信号一起可操作的复位信号,以(a)在读出阶段期间使能够从像素节点到列节点的通过,以及(b)将像素节点设置为预定的信号电平 复位阶段。

    Sample and hold circuit and active pixel sensor array sampling system utilizing same
    5.
    发明授权
    Sample and hold circuit and active pixel sensor array sampling system utilizing same 有权
    采样保持电路和有源像素传感器阵列采样系统

    公开(公告)号:US07719581B2

    公开(公告)日:2010-05-18

    申请号:US12108002

    申请日:2008-04-23

    CPC classification number: H04N5/3658 H04N5/3575 H04N5/378

    Abstract: An active pixel sensor array sampling system includes a plurality of video circuits and reset circuits. A video circuit generates a video voltage from each one of the pixels of a column of pixels. An associated reset circuit generates a reset voltage for each of the pixels of a column of pixels. The video circuits and the reset circuits are closed loop sample and hold circuits. The active pixel sensor array is integrated on an integrated circuit.

    Abstract translation: 有源像素传感器阵列采样系统包括多个视频电路和复位电路。 视频电路从像素列的每个像素生成视频电压。 相关联的复位电路为像素列的每个像素生成复位电压。 视频电路和复位电路是闭环采样和保持电路。 有源像素传感器阵列集成在集成电路上。

    Method and apparatus for optimizing image sensor noise and dynamic range
    6.
    发明授权
    Method and apparatus for optimizing image sensor noise and dynamic range 有权
    用于优化图像传感器噪声和动态范围的方法和装置

    公开(公告)号:US07440012B2

    公开(公告)日:2008-10-21

    申请号:US10427318

    申请日:2003-04-30

    CPC classification number: H04N5/3698 H04N5/235 H04N5/2351 H04N5/374

    Abstract: A method and apparatus for optimizing the voltage supply of an image sensor pixel array to minimize pixel noise and maximize dynamic range is disclosed. The voltage supply is adjusted in response to the exposure level of the pixel array when it captures an image. The voltage supply is increased in higher exposure levels to expand the dynamic range of the pixel array. In lower exposure levels, when the full dynamic range of the pixel array is not utilized, the voltage supply is decreased to lower pixel noise level and reduce its effect on image quality.

    Abstract translation: 公开了一种用于优化图像传感器像素阵列的电压供应以最小化像素噪声并最大化动态范围的方法和装置。 当捕获图像时,响应于像素阵列的曝光水平来调整电压源。 在更高的曝光水平下,电压供应增加,以扩大像素阵列的动态范围。 在较低的曝光水平下,当不利用像素阵列的全动态范围时,电压降低到较低的像素噪声水平,并降低其对图像质量的影响。

    SAMPLE AND HOLD CIRCUIT AND ACTIVE PIXEL SENSOR ARRAY SAMPLING SYSTEM UTILIZING SAME
    7.
    发明申请
    SAMPLE AND HOLD CIRCUIT AND ACTIVE PIXEL SENSOR ARRAY SAMPLING SYSTEM UTILIZING SAME 有权
    采样和保持电路和主动像素传感器阵列采样系统

    公开(公告)号:US20080198245A1

    公开(公告)日:2008-08-21

    申请号:US12108002

    申请日:2008-04-23

    CPC classification number: H04N5/3658 H04N5/3575 H04N5/378

    Abstract: An active pixel sensor array sampling system includes a plurality of video circuits and reset circuits. A video circuit generates a video voltage from each one of the pixels of a column of pixels. An associated reset circuit generates a reset voltage for each of the pixels of a column of pixels. The video circuits and the reset circuits are closed loop sample and hold circuits. The active pixel sensor array is integrated on an integrated circuit.

    Abstract translation: 有源像素传感器阵列采样系统包括多个视频电路和复位电路。 视频电路从像素列的每个像素生成视频电压。 相关联的复位电路为像素列的每个像素生成复位电压。 视频电路和复位电路是闭环采样和保持电路。 有源像素传感器阵列集成在集成电路上。

    CIRCUIT FOR AN ACTIVE PIXEL
    8.
    发明申请
    CIRCUIT FOR AN ACTIVE PIXEL 有权
    有源像素电路

    公开(公告)号:US20080192136A1

    公开(公告)日:2008-08-14

    申请号:US12061806

    申请日:2008-04-03

    CPC classification number: H01L27/14643 H04N5/376

    Abstract: A pixel circuit includes a pixel-capture device having a pixel node and operable to convert light intensity into a pixel signal at the pixel node, the pixel signal representing a captured pixel. A row node carries a row signal that is operable to both (a) enable passage of the pixel signal from the pixel node to a column node during a readout phase of the captured pixel, and (b) set the pixel node to a predetermined signal level during a reset phase of the captured pixel. The reset phase and the readout phase are configured to occur during different time intervals. A reset node is included for carrying a reset signal that is operable together with the row signal to (a) enable passage from the pixel node to the column node during the readout phase, and (b) set the pixel node to the predetermined signal level during the reset phase.

    Abstract translation: 像素电路包括具有像素节点并且可操作以将光强转换为像素节点处的像素信号的像素捕获装置,该像素信号表示捕获的像素。 行节点携带行信号,其可操作以(a)在捕获的像素的读出阶段期间能够使像素信号从像素节点传递到列节点,并且(b)将像素节点设置为预定信号 在捕获的像素的复位阶段期间。 复位阶段和读出阶段被配置为在不同的时间间隔期间发生。 包括复位节点,用于携带与行信号一起可操作的复位信号,以便(a)在读出阶段期间能够从像素节点通过列节点,以及(b)将像素节点设置为预定信号电平 在复位阶段。

    Circuit for an active pixel sensor
    9.
    发明授权
    Circuit for an active pixel sensor 有权
    有源像素传感器电路

    公开(公告)号:US07369168B2

    公开(公告)日:2008-05-06

    申请号:US10630647

    申请日:2003-07-29

    CPC classification number: H01L27/14643 H04N5/376

    Abstract: A pixel circuit includes a silicon substrate having a photodiode that converts light intensity into a voltage signal and two metal layers disposed on the substrate having a pixel control circuit. The first metal layer includes a row trace and a reset trace and the second metal layer includes a column trace and a voltage supply trace. The row trace carries a signal that activates a switch for coupling the photodiode to the column trace during a readout phase and clears the voltage at the photodiode during a reset phase. The column trace interfaces with a signal capture circuit in a CMOS array of pixels for capturing a digital image that corresponds to each voltage level at each photodiode.

    Abstract translation: 像素电路包括具有将光强度转换为电压信号的光电二极管的硅衬底和设置在具有像素控制电路的衬底上的两个金属层。 第一金属层包括行迹线和复位迹线,第二金属层包括列迹线和电压迹线。 行迹线传输一个信号,激活一个开关,用于在读出阶段将光电二极管耦合到列轨迹,并在复位阶段清除光电二极管的电压。 列轨迹与CMOS阵列中的信号捕获电路接口,用于捕获与每个光电二极管处的每个电压电平相对应的数字图像。

Patent Agency Ranking