Abstract:
An active pixel sensor array sampling system includes a plurality of video circuits and reset circuits. A video circuit generates a video voltage from each one of the pixels of a column of pixels. An associated reset circuit generates a reset voltage for each of the pixels of a column of pixels. The video circuits and the reset circuits are closed loop sample and hold circuits. The active pixel sensor array is integrated on an integrated circuit.
Abstract:
An active pixel sensor (APS) image sensor comprises an array of pixel circuits corresponding to rows and columns of pixels, a plurality of amplifiers that buffer signals output by the array of pixel circuits, and a plurality of sample and hold circuits that read the buffered signals. A routing mechanism is positioned between the array of pixel circuits and the plurality of amplifiers. A controller selects a set of the pixel circuits for sampling and is configured to control the routing mechanism to couple each pixel circuit in the set to a different one of the amplifiers during a normal mode of operation and to couple each pixel circuit of a subset of pixel circuits in a first set of pixel circuits to a different amplifier of a first subset of the amplifiers, to couple each pixel circuit of a subset of pixel circuits in a second set of pixel circuits to a different amplifier of a second subset of the amplifiers, and to connect the amplifiers of the first and second subsets of amplifiers in pairs to a common one of the sample and hold circuits during a sub-sampling mode of operation.
Abstract:
A method and apparatus for optimizing the voltage supply of an image sensor pixel array to minimize pixel noise and maximize dynamic range is disclosed. The voltage supply is adjusted in response to the exposure level of the pixel array when it captures an image. The voltage supply is increased in higher exposure levels to expand the dynamic range of the pixel array. In lower exposure levels, when the full dynamic range of the pixel array is not utilized, the voltage supply is decreased to lower pixel noise level and reduce its effect on image quality.
Abstract:
A pixel circuit includes a pixel-capture device having a pixel node and operable to convert light intensity into a pixel signal at the pixel node, the pixel signal representing a captured pixel. A row node carries a row signal that is operable to both (a) enable passage of the pixel signal from the pixel node to a column node during a readout phase of the captured pixel, and (b) set the pixel node to a predetermined signal level during a reset phase of the captured pixel. The reset phase and the readout phase are configured to occur during different time intervals. A reset node is included for carrying a reset signal that is operable together with the row signal to (a) enable passage from the pixel node to the column node during the readout phase, and (b) set the pixel node to predetermined signal level during the reset phase.
Abstract:
An active pixel sensor array sampling system includes a plurality of video circuits and reset circuits. A video circuit generates a video voltage from each one of the pixels of a column of pixels. An associated reset circuit generates a reset voltage for each of the pixels of a column of pixels. The video circuits and the reset circuits are closed loop sample and hold circuits. The active pixel sensor array is integrated on an integrated circuit.
Abstract:
A method and apparatus for optimizing the voltage supply of an image sensor pixel array to minimize pixel noise and maximize dynamic range is disclosed. The voltage supply is adjusted in response to the exposure level of the pixel array when it captures an image. The voltage supply is increased in higher exposure levels to expand the dynamic range of the pixel array. In lower exposure levels, when the full dynamic range of the pixel array is not utilized, the voltage supply is decreased to lower pixel noise level and reduce its effect on image quality.
Abstract:
An active pixel sensor array sampling system includes a plurality of video circuits and reset circuits. A video circuit generates a video voltage from each one of the pixels of a column of pixels. An associated reset circuit generates a reset voltage for each of the pixels of a column of pixels. The video circuits and the reset circuits are closed loop sample and hold circuits. The active pixel sensor array is integrated on an integrated circuit.
Abstract:
A pixel circuit includes a pixel-capture device having a pixel node and operable to convert light intensity into a pixel signal at the pixel node, the pixel signal representing a captured pixel. A row node carries a row signal that is operable to both (a) enable passage of the pixel signal from the pixel node to a column node during a readout phase of the captured pixel, and (b) set the pixel node to a predetermined signal level during a reset phase of the captured pixel. The reset phase and the readout phase are configured to occur during different time intervals. A reset node is included for carrying a reset signal that is operable together with the row signal to (a) enable passage from the pixel node to the column node during the readout phase, and (b) set the pixel node to the predetermined signal level during the reset phase.
Abstract:
A pixel circuit includes a silicon substrate having a photodiode that converts light intensity into a voltage signal and two metal layers disposed on the substrate having a pixel control circuit. The first metal layer includes a row trace and a reset trace and the second metal layer includes a column trace and a voltage supply trace. The row trace carries a signal that activates a switch for coupling the photodiode to the column trace during a readout phase and clears the voltage at the photodiode during a reset phase. The column trace interfaces with a signal capture circuit in a CMOS array of pixels for capturing a digital image that corresponds to each voltage level at each photodiode.