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    METHOD FOR PRODUCING A PLURALITY OF CHIPS AND A CHIP PRODUCED ACCORDINGLY
    1.
    发明申请
    METHOD FOR PRODUCING A PLURALITY OF CHIPS AND A CHIP PRODUCED ACCORDINGLY 有权
    一种生产多汁和方便生产的芯片的方法

    公开(公告)号：US20100283147A1

    公开(公告)日：2010-11-11

    申请号：US12677068

    申请日：2008-07-24

    Applicant: Torsten Kramer ,  Matthias Boehringer ,  Stefan Pinter ,  Hubert Benzel ,  Matthias Illing ,  Frieder Haag ,  Simon Ambruster

    Inventor： Torsten Kramer ,  Matthias Boehringer ,  Stefan Pinter ,  Hubert Benzel ,  Matthias Illing ,  Frieder Haag ,  Simon Ambruster

    IPC: H01L23/498 ,  H01L21/56

    CPC classification number: H01L21/78 ,  B81C1/00896 ,  B81C2201/053

    Abstract: A production method for chips, in which as many method steps as possible are carried out in the wafer composite, that is, in parallel for a plurality of chips disposed on a wafer. This is a method for producing a plurality of chips whose functionality is implemented on the basis of the surface layer of a substrate. In this method, the surface layer is patterned and at least one cavity is produced below the surface layer, so that the individual chip regions are connected to each other and/or to the rest of the substrate by suspension webs only, and/or so that the individual chip regions are connected to the substrate layer below the cavity via supporting elements in the region of the cavity. The suspension webs and/or supporting elements are cut when the chips are separated. The patterned and undercut surface layer of the substrate is embedded in a plastic mass before the chips are separated.

    Abstract translation: 一种芯片的制造方法，其中在晶片复合体中进行尽可能多的方法步骤，即对于设置在晶片上的多个芯片并行。 这是用于制造多个芯片的方法，其功能是基于基板的表面层来实现的。 在该方法中，对表面层进行图案化，并且在表面层下方产生至少一个空腔，使得单独的芯片区域仅通过悬挂网彼此连接和/或连接到基板的其余部分，和/或 单个芯片区域通过腔体区域中的支撑元件连接到腔体下方的衬底层。 当芯片分离时，悬挂网和/或支撑元件被切割。 在芯片分离之前，将衬底的图案和底切表面层嵌入塑料块中。

    Method for producing a plurality of chips and a chip produced accordingly
    2.
    发明授权
    Method for producing a plurality of chips and a chip produced accordingly 有权
    用于生产多个芯片的方法和相应地制造的芯片

    公开(公告)号：US08405210B2

    公开(公告)日：2013-03-26

    申请号：US12677068

    申请日：2008-07-24

    Applicant: Torsten Kramer ,  Matthias Boehringer ,  Stefan Pinter ,  Hubert Benzel ,  Matthias Illing ,  Frieder Haag ,  Simon Ambruster

    Inventor： Torsten Kramer ,  Matthias Boehringer ,  Stefan Pinter ,  Hubert Benzel ,  Matthias Illing ,  Frieder Haag ,  Simon Ambruster

    IPC: H01L23/498

    CPC classification number: H01L21/78 ,  B81C1/00896 ,  B81C2201/053

    Abstract: A production method for chips, in which as many method steps as possible are carried out in the wafer composite, that is, in parallel for a plurality of chips disposed on a wafer. This is a method for producing a plurality of chips whose functionality is implemented on the basis of the surface layer of a substrate. In this method, the surface layer is patterned and at least one cavity is produced below the surface layer, so that the individual chip regions are connected to each other and/or to the rest of the substrate by suspension webs only, and/or so that the individual chip regions are connected to the substrate layer below the cavity via supporting elements in the region of the cavity. The suspension webs and/or supporting elements are cut when the chips are separated. The patterned and undercut surface layer of the substrate is embedded in a plastic mass before the chips are separated.

    Abstract translation: 一种芯片的制造方法，其中在晶片复合体中进行尽可能多的方法步骤，即对于设置在晶片上的多个芯片并行。 这是用于制造多个芯片的方法，其功能是基于基板的表面层来实现的。 在该方法中，对表面层进行图案化，并且在表面层下方产生至少一个空腔，使得单独的芯片区域仅通过悬挂网彼此连接和/或连接到基板的其余部分，和/或 单个芯片区域通过腔体区域中的支撑元件连接到腔体下方的衬底层。 当碎片分离时，悬挂网和/或支撑元件被切割。 在芯片分离之前，将衬底的图案和底切表面层嵌入塑料块中。

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