-
1.发明授权Semiconductor devices including mesa structures and multiple passivation layers 有权半导体器件包括台面结构和多个钝化层公开(公告)号：US07642626B2
公开(公告)日：2010-01-05
申请号：US11959725
申请日：2007-12-19
IPC分类号： H01L29/06 , H01L33/00 , H01L29/74 , H01L31/111
CPC分类号： H01L33/145 , H01S5/021 , H01S5/0421 , H01S5/0425 , H01S5/22 , H01S5/2205 , H01S5/2206 , H01S5/2214 , H01S5/2231 , H01S5/2275 , H01S5/32341 , H01S2301/176
摘要： A semiconductor device including a semiconductor structure defining a mesa having a mesa surface and mesa sidewalls, and first and second passivation layers. The first passivation layer may be on at least portions of the mesa sidewalls, at least a portion of the mesa surface may be free of the first passivation layer, and the first passivation layer may include a first material. The second passivation layer may be on the first passivation layer, at least a portion of the mesa surface may be free of the second passivation layer, and the second passivation layer may include a second material different than the first material.
摘要翻译： 一种半导体器件，包括限定具有台面表面和台面侧壁的台面的半导体结构以及第一和第二钝化层。 第一钝化层可以在台面侧壁的至少部分上，台面表面的至少一部分可以没有第一钝化层，并且第一钝化层可以包括第一材料。 第二钝化层可以在第一钝化层上，台面表面的至少一部分可以没有第二钝化层，并且第二钝化层可以包括不同于第一材料的第二材料。
-
2.发明授权Methods of forming semiconductor devices including mesa structures and multiple passivation layers 有权形成半导体器件的方法包括台面结构和多个钝化层公开(公告)号：US07329569B2
公开(公告)日：2008-02-12
申请号：US10741240
申请日：2003-12-19
IPC分类号： H01L21/00 , H01L21/84 , H01L21/8242 , H01L21/8236
CPC分类号： H01L33/145 , H01S5/021 , H01S5/0421 , H01S5/0425 , H01S5/22 , H01S5/2205 , H01S5/2206 , H01S5/2214 , H01S5/2231 , H01S5/2275 , H01S5/32341 , H01S2301/176
摘要： A method of forming a semiconductor device may include forming a semiconductor structure on a substrate wherein the semiconductor structure defines a mesa having a mesa surface opposite the substrate and mesa sidewalls between the mesa surface and the substrate. A first passivation layer can be formed on at least portions of the mesa sidewalls and on the substrate adjacent the mesa sidewalls wherein at least a portion of the mesa surface is free of the first passivation layer and wherein the first passivation layer comprises a first material. A second passivation layer can be formed on the first passivation layer wherein at least a portion of the mesa surface is free of the second passivation layer, and wherein the second passivation layer comprises a second material different than the first material. Related devices are also discussed.
摘要翻译： 形成半导体器件的方法可以包括在衬底上形成半导体结构，其中半导体结构限定具有与衬底相对的台面的台面和台面与衬底之间的台面侧壁。 第一钝化层可以形成在台面侧壁的至少部分和邻近台面侧壁的基板上，其中台面表面的至少一部分不含第一钝化层，并且其中第一钝化层包括第一材料。 可以在第一钝化层上形成第二钝化层，其中台面表面的至少一部分不含第二钝化层，并且其中第二钝化层包括不同于第一材料的第二材料。 还讨论了相关设备。
-
3.发明授权Semiconductor devices having self aligned semiconductor mesas and contact layers 有权具有自对准半导体台面和接触层的半导体器件公开(公告)号：US07613219B2
公开(公告)日：2009-11-03
申请号：US11520383
申请日：2006-09-13
CPC分类号： H01L33/145 , H01S5/021 , H01S5/0421 , H01S5/0425 , H01S5/22 , H01S5/2205 , H01S5/2206 , H01S5/2214 , H01S5/2231 , H01S5/2275 , H01S5/32341 , H01S2301/176
摘要： Methods of forming a semiconductor device can include forming a semiconductor structure on a substrate, the semiconductor structure having mesa sidewalls and a mesa surface opposite the substrate. A contact layer can be formed on the mesa surface wherein the contact layer has sidewalls and a contact surface opposite the mesa surface and wherein the contact layer extends across substantially an entirety of the mesa surface. A passivation layer can be formed on the mesa sidewalls and on portions of the contact layer sidewalls adjacent the mesa surface, and the passivation layer can expose substantially an entirety of the contact surface of the contact layer. Related devices are also discussed.
摘要翻译： 形成半导体器件的方法可以包括在衬底上形成半导体结构，半导体结构具有台面侧壁和与衬底相对的台面。 接触层可以形成在台面表面上，其中接触层具有侧壁和与台面表面相对的接触表面，并且其中接触层延伸穿过基本上整个台面表面。 可以在台面侧壁和邻近台面表面的接触层侧壁的部分上形成钝化层，并且钝化层可以暴露接触层的基本上整个接触表面。 还讨论了相关设备。
-
4.发明申请SEMICONDUCTOR DEVICES INCLUDING MESA STRUCTURES AND MULTIPLE PASSIVATION LAYERS 有权包括MESA结构和多个钝化层的半导体器件公开(公告)号：US20080135982A1
公开(公告)日：2008-06-12
申请号：US11959725
申请日：2007-12-19
IPC分类号： H01L29/06
CPC分类号： H01L33/145 , H01S5/021 , H01S5/0421 , H01S5/0425 , H01S5/22 , H01S5/2205 , H01S5/2206 , H01S5/2214 , H01S5/2231 , H01S5/2275 , H01S5/32341 , H01S2301/176
摘要： A semiconductor device including a semiconductor structure defining a mesa having a mesa surface and mesa sidewalls, and first and second passivation layers. The first passivation layer may be on at least portions of the mesa sidewalls, at least a portion of the mesa surface may be free of the first passivation layer, and the first passivation layer may include a first material. The second passivation layer may be on the first passivation layer, at least a portion of the mesa surface may be free of the second passivation layer, and the second passivation layer may include a second material different than the first material.
摘要翻译： 一种半导体器件，包括限定具有台面表面和台面侧壁的台面的半导体结构以及第一和第二钝化层。 第一钝化层可以在台面侧壁的至少部分上，台面表面的至少一部分可以没有第一钝化层，并且第一钝化层可以包括第一材料。 第二钝化层可以在第一钝化层上，台面表面的至少一部分可以没有第二钝化层，并且第二钝化层可以包括不同于第一材料的第二材料。
-
5.发明授权Methods of forming semiconductor devices having self aligned semiconductor mesas and contact layers 有权形成具有自对准半导体台面和接触层的半导体器件的方法公开(公告)号：US07160747B2
公开(公告)日：2007-01-09
申请号：US10741705
申请日：2003-12-19
IPC分类号： H01L21/00
CPC分类号： H01L33/145 , H01S5/021 , H01S5/0421 , H01S5/0425 , H01S5/22 , H01S5/2205 , H01S5/2206 , H01S5/2214 , H01S5/2231 , H01S5/2275 , H01S5/32341 , H01S2301/176
摘要： Methods of forming a semiconductor device can include forming a semiconductor structure on a substrate, the semiconductor structure having mesa sidewalls and a mesa surface opposite the substrate. A contact layer can be formed on the mesa surface wherein the contact layer has sidewalls and a contact surface opposite the mesa surface and wherein the contact layer extends across substantially an entirety of the mesa surface. A passivation layer can be formed on the mesa sidewalls and on portions of the contact layer sidewalls adjacent the mesa surface, and the passivation layer can expose substantially an entirety of the contact surface of the contact layer.
摘要翻译： 形成半导体器件的方法可以包括在衬底上形成半导体结构，半导体结构具有台面侧壁和与衬底相对的台面。 接触层可以形成在台面表面上，其中接触层具有侧壁和与台面表面相对的接触表面，并且其中接触层延伸穿过基本上整个台面表面。 可以在台面侧壁和邻近台面表面的接触层侧壁的部分上形成钝化层，并且钝化层可以暴露接触层的基本上整个接触表面。
-
-
-
-
搜索结果
5 条记录 (耗时 0.016 秒)
