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公开(公告)号：US09885737B2
公开(公告)日：2018-02-06
申请号：US14996045
申请日：2016-01-14
发明人： Lynwood Adams , Jack Lewis
CPC分类号： G01R1/07328 , G01R1/0466 , G01R1/07314 , G01R31/2879 , G01R31/2886 , G01R31/2889 , G01R31/2896
摘要： A testing system for semiconductor chips having a removable device under test printed circuit board (DUT PCB) that electrically connects with the electrical testing components of the system. A removable top plate is placed on top of the DUT PCB and is locked in place by a plurality of locking posts that selectively connect to cam surfaces in the top plate that pull the top plate down sandwiching the DUT PCB between the top plate and the electrical testing components of the system. The DUT PCB is quickly and easily removed and replaced by moving the locking posts between an engaged position and a disengaged position. In this way, a single testing system can be used to test a great variety of semiconductor chips thereby reducing capital equipment costs and space needed in cleanrooms.
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公开(公告)号：USD751433S1
公开(公告)日：2016-03-15
申请号：US29513801
申请日：2015-01-06
设计人： Lynwood Adams , Jack Lewis
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公开(公告)号：USD821337S1
公开(公告)日：2018-06-26
申请号：US29515098
申请日：2015-01-20
设计人： Lynwood Dale Adams , Jack Lewis
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公开(公告)号：US20170192046A1
公开(公告)日：2017-07-06
申请号：US15462383
申请日：2017-03-17
发明人： Lynwood Adams , Jack Lewis
IPC分类号： G01R31/04
CPC分类号： G01R1/07328 , G01R1/0466 , G01R1/07314 , G01R31/2879 , G01R31/2886 , G01R31/2889 , G01R31/2896
摘要： A testing system for electrical interconnects having a removable device under test printed circuit board (DUT PCB) that electrically connects with the electrical testing components of the system. A removable top plate is placed on top of the DUT PCB and is locked in place by a plurality of locking posts that selectively connect to cam surfaces in the top plate that pull the top plate down sandwiching the DUT PCB between the top plate and the electrical testing components of the system. An actuator is also presented that presses the device under test into the electrical interconnect at increments where tests are performed on one, some or all of the contact points of the electrical interconnect. This information is then analyzed and graphed to assist with determine the optimum force and/or height to use during actual use.
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公开(公告)号：US20160209443A1
公开(公告)日：2016-07-21
申请号：US14996045
申请日：2016-01-14
发明人： Lynwood Adams , Jack Lewis
CPC分类号： G01R1/07328 , G01R1/0466 , G01R1/07314 , G01R31/2879 , G01R31/2886 , G01R31/2889 , G01R31/2896
摘要： A testing system for semiconductor chips having a removable device under test printed circuit board (DUT PCB) that electrically connects with the electrical testing components of the system. A removable top plate is placed on top of the DUT PCB and is locked in place by a plurality of locking posts that selectively connect to cam surfaces in the top plate that pull the top plate down sandwiching the DUT PCB between the top plate and the electrical testing components of the system. The DUT PCB is quickly and easily removed and replaced by moving the locking posts between an engaged position and a disengaged position. In this way, a single testing system can be used to test a great variety of semiconductor chips thereby reducing capital equipment costs and space needed in cleanrooms.
摘要翻译： 一种用于半导体芯片的测试系统，其具有与该系统的电气测试部件电连接的可测试的印刷电路板（DUT PCB）。 可拆卸的顶板被放置在DUT PCB的顶部上，并且被多个锁定杆锁定在适当位置，多个锁定杆选择性地连接到顶板中的凸轮表面，该顶板将顶板向下拉，将DUT PCB夹在顶板和电气 测试系统的组件。 通过在锁定位置和脱离位置之间移动锁定位置，可快速方便地拆下DUT PCB并进行更换。 以这种方式，可以使用单个测试系统来测试各种各样的半导体芯片，从而降低洁净室所需的资本设备成本和空间。
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公开(公告)号：USD821338S1
公开(公告)日：2018-06-26
申请号：US29515127
申请日：2015-01-20
设计人： Lynwood Dale Adams , Jack Lewis
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公开(公告)号：US10156586B2
公开(公告)日：2018-12-18
申请号：US15462383
申请日：2017-03-17
发明人： Lynwood Adams , Jack Lewis
摘要： A testing system for electrical interconnects having a removable device under test printed circuit board (DUT PCB) that electrically connects with the electrical testing components of the system. A removable top plate is placed on top of the DUT PCB and is locked in place by a plurality of locking posts that selectively connect to cam surfaces in the top plate that pull the top plate down sandwiching the DUT PCB between the top plate and the electrical testing components of the system. An actuator is also presented that presses the device under test into the electrical interconnect at increments where tests are performed on one, some or all of the contact points of the electrical interconnect. This information is then analyzed and graphed to assist with determine the optimum force and/or height to use during actual use.
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