公开(公告)号：US20140187256A1

公开(公告)日：2014-07-03

申请号：US13729137

申请日：2012-12-28

Applicant: PRASAD MODALI ,  UMA M. GADAMSETTY ,  JOHN WEI

Inventor： PRASAD MODALI ,  UMA M. GADAMSETTY ,  JOHN WEI

IPC: H04W4/02

CPC classification number: H04W4/027 ,  H04W4/021

Abstract: In one embodiment an electronic device comprises a display, a motion sensor, one or more wireless communication devices, and logic configured to receive, in the controller, data indicating that the controller is in motion, determine a velocity of the controller, and activate a first location service to determine a coarse location of the controller when the velocity of the controller falls above a predetermined threshold for a predetermined period of time. Other embodiments may be described.

Abstract translation: 在一个实施例中，电子设备包括显示器，运动传感器，一个或多个无线通信设备和被配置为在控制器中接收指示控制器处于运动中的数据的逻辑，确定控制器的速度，并激活 当控制器的速度达到预定阈值达预定时间段时，确定控制器的粗略位置的第一位置服务。 可以描述其他实施例。

公开(公告)号：US07286550B2

公开(公告)日：2007-10-23

申请号：US10318769

申请日：2002-12-13

Applicant: Prasad Modali ,  Nirmal Raj Saxena

Inventor： Prasad Modali ,  Nirmal Raj Saxena

IPC: H04L12/28

CPC classification number: H04L47/24 ,  H04L47/10 ,  H04L47/20 ,  H04L47/29 ,  H04L47/30 ,  H04L47/326

Abstract: A system and method is provided for traffic management and regulation in a packet-based communication network, the system and method facilitating proactive, discriminating congestion control on a per flow basis of packets traversing the Internet via use of a Weighted Random Early Detection (WRED) algorithm that monitors the incoming packet queue and optimizes enqueuing or discard of incoming packets to stabilize queue length and promote efficient packet processing. During optimized discard conditions, the system and method discern a relative priority among incoming packets, distribute packets with a relatively high priority and discard packets with a relatively low priority. Additionally, packet traffic are policed and discarded according to packet type, quantity or other predetermined criteria. The present invention performs in periodic mode, demand mode or both, and can be implemented as a hardware solution, a software solution, or a combination thereof.

Abstract translation: 提供了一种用于基于分组的通信网络中的流量管理和调节的系统和方法，所述系统和方法通过使用加权随机早期检测（WRED）来促进主动地识别跨越因特网的分组的每流的拥塞控制， 该算法监视传入的数据包队列，并优化进入数据包的入队或丢弃，以稳定队列长度并促进高效的数据包处理。 在优化的丢弃条件下，系统和方法识别输入报文的相对优先级，分配具有较高优先级的报文，丢弃具有较低优先级的报文。 此外，根据分组类型，数量或其他预定标准对分组业务进行监管和丢弃。 本发明以周期模式，需求模式或两者都执行，并且可以被实现为硬件解决方案，软件解决方案或其组合。

公开(公告)号：US07216138B2

公开(公告)日：2007-05-08

申请号：US09783875

申请日：2001-02-14

Applicant: Mohammad Abdallah ,  Prasad Modali ,  Chien-Yu Huang, legal representative ,  Thomas R. Huff ,  Vladimir Pentkovski ,  Patrice Roussel ,  Shreekant S. Thakkar

Inventor： Hsien-Cheng E. Hsieh, deceased

IPC: G06F7/00 ,  G06F9/30

CPC classification number: H03M7/24

Abstract: A method and apparatus are described for converting a number from a floating point format to an integer format or from an integer format to a floating point format responsive to a control signal of a control signal format.Numbers are stored in the floating point format in a register of a first set of architectural registers in a packed format. One or more numbers in the floating point format are converted to the integer format and placed in a register of a second set of architectural registers in a packed format. Conversion from integer format to floating point format is performed in a similar manner.A floating point arithmetic apparatus is described that provides for converting a plurality of numbers between integer formats and a floating point formats, further providing for conversion operations that require a greater data path width than floating-point arithmetic operations.

Abstract translation: 描述了一种方法和装置，用于响应于控制信号格式的控制信号将数字从浮点格式转换为整数格式或从整数格式转换为浮点格式。 数字以浮点格式存储在打包格式的第一组结构寄存器的寄存器中。 浮点格式中的一个或多个数字被转换为整数格式，并以打包格式放置在第二组体系结构寄存器的寄存器中。 以类似的方式执行从整数格式到浮点格式的转换。 描述了一种浮点运算装置，其提供了整数格式和浮点格式之间的多个数字的转换，进一步提供了需要比浮点算术运算更大的数据路径宽度的转换操作。

公开(公告)号：US20160284090A1

公开(公告)日：2016-09-29

申请号：US14671883

申请日：2015-03-27

Applicant: Yu Huang ,  Prasad Modali

Inventor： Yu Huang ,  Prasad Modali

IPC: G06T7/00 ,  H04N13/00

CPC classification number: H04N13/111 ,  G06T7/593 ,  G06T2207/20056 ,  G06T2207/20064 ,  H04N2013/0081

Abstract: Techniques related to stereo image correspondence are discussed. Such techniques may include determining a filtered cost volume for stereo images using phase domain based costs and selecting disparity values for pixel locations based on the filtered cost volume. The filtered cost volume may be generated based on phase matching costs in single or multi-resolution.

Abstract translation: 讨论与立体图像对应有关的技术。 这样的技术可以包括使用基于相域的成本确定用于立体图像的经过滤的成本体积，并且基于滤波的成本体积来选择像素位置的视差值。 可以基于单分辨率或多分辨率的相位匹配成本来生成经过滤的成本量。

公开(公告)号：US20080163022A1

公开(公告)日：2008-07-03

申请号：US11617251

申请日：2006-12-28

Applicant: Kamal J. Koshy ,  Raghavan Sudhakar ,  Prasad Modali

Inventor： Kamal J. Koshy ,  Raghavan Sudhakar ,  Prasad Modali

IPC: H03M13/05

CPC classification number: H03M13/235 ,  H03M13/2957 ,  H03M13/2987 ,  H03M13/2993 ,  H03M13/6544

Abstract: Embodiments of encoding input data into parity data in mechanisms are described generally herein. Other embodiments may be described and claimed.

Abstract translation: 本文一般地描述将输入数据编码到机构中的奇偶校验数据的实施例。 可以描述和要求保护其他实施例。

公开(公告)号：US07853858B2

公开(公告)日：2010-12-14

申请号：US11617251

申请日：2006-12-28

Applicant: Kamal J Koshy ,  Raghavan Sudhakar ,  Prasad Modali

Inventor： Kamal J Koshy ,  Raghavan Sudhakar ,  Prasad Modali

IPC: H03M13/03

CPC classification number: H03M13/235 ,  H03M13/2957 ,  H03M13/2987 ,  H03M13/2993 ,  H03M13/6544

Abstract: Embodiments of encoding input data into parity data in mechanisms are described generally herein. Other embodiments may be described and claimed.

Abstract translation: 本文一般地描述将输入数据编码到机构中的奇偶校验数据的实施例。 可以描述和要求保护其他实施例。

公开(公告)号：US06687256B2

公开(公告)日：2004-02-03

申请号：US10325104

申请日：2002-12-19

Applicant: Prasad Modali ,  Anil Babu Nangunoori ,  Nirmal Raj Saxena

Inventor： Prasad Modali ,  Anil Babu Nangunoori ,  Nirmal Raj Saxena

IPC: H04L1228

CPC classification number: H04L47/10 ,  H04L47/28 ,  H04L47/36 ,  H04L49/90 ,  H04L49/901 ,  H04L49/9078 ,  H04L49/9084

Abstract: The present invention provides a unique system and method for optimizing packet processing flow in a communications network by minimizing latency associated with packet-forwarding eligibility determinations. The present invention employs a speculative scheme with automatic recovery, including a two-way multithreaded implementation designed to overcome the aforementioned latency issue, including the functionality of enqueuing an incoming packet in both packet memory and a cut through buffer; determining the packet's eligibility for cutting through the buffer; and based on the determination, rolling back the unsuccessful process.

Abstract translation: 本发明提供了一种独特的系统和方法，用于通过最小化与分组转发资格确定相关联的延迟来优化通信网络中的分组处理流程。 本发明采用具有自动恢复的推测方案，包括旨在克服上述等待时间问题的双向多线程实现，包括在分组存储器和切入缓冲器中对输入分组进行排队的功能; 确定数据包是否有资格切入缓冲区; 并根据决定，回滚不成功的过程。

公开(公告)号：US06282554B1

公开(公告)日：2001-08-28

申请号：US09071466

申请日：1998-04-30

Applicant: Mohammad A. Abdallah ,  Prasad Modali

Inventor： Mohammad A. Abdallah ,  Prasad Modali

IPC: G06F700

CPC classification number: H03M7/24

Abstract: A floating point arithmetic apparatus for converting numbers between an integer format and a floating point format, wherein a conversion operation requires a greater data path width than a conversion operation. The apparatus comprises right shift circuitry that receives a number in the floating point format, wherein the right shift circuitry includes additional register positions to accommodate a shift beyond a data path width required by an arithmetic operation.

Abstract translation: 一种用于在整数格式和浮点格式之间转换数字的浮点算术装置，其中转换操作需要比转换操作更大的数据路径宽度。 该装置包括接收浮点格式的数字的右移位电路，其中右移电路包括附加的寄存器位置，以适应超出算术运算所需的数据路径宽度的移位。