公开(公告)号：US5489500A

公开(公告)日：1996-02-06

申请号：US97601

申请日：1993-07-27

申请人： John Andrejack ,  Natalie B. Feilchenfeld ,  David B. Stone ,  Paul G. Wilkin ,  Michael Wozniak

发明人： John Andrejack ,  Natalie B. Feilchenfeld ,  David B. Stone ,  Paul G. Wilkin ,  Michael Wozniak

IPC分类号： H05K1/00 ,  H05K3/00 ,  H05K3/46 ,  G03F7/26

CPC分类号： H05K3/4635 ,  H05K3/462 ,  H05K3/4641 ,  H05K1/0393 ,  H05K2201/09318 ,  H05K2201/09536 ,  H05K3/0047 ,  H05K3/4623 ,  H05K3/4691

摘要： Disclosed is a parallel processor packaging structure and a method for manufacturing the structure. The individual logic and memory elements are on printed circuit cards. These printed circuit boards and cards are, in turn, mounted on or connected to circuitized flexible substrates extending outwardly from a laminate of the circuitized, flexible substrates. Intercommunication is provided through a switch structure that is implemented in the laminate. The printed circuit cards are mounted on or connected to a plurality of circuitized flexible substrates, with one printed circuit card at each end of the circuitized flexible circuit. The circuitized flexible substrates connect the separate printed circuit boards and cards through the central laminate portion. This laminate portion provides XY plane and Z-axis interconnection for inter-processor, inter-memory, inter-processor/memory element, and processor to memory bussing interconnection, and communication. The planar circuitization, as data lines, address lines, and control lines of a logic chip or a memory chip are on the individual printed circuit boards and cards, which are connected through the circuitized flex, and communicate with other layers of flex through Z-axis circuitization (vias and through holes) in the laminate. The individual circuitized flexible strips are discrete subassemblies. These subassemblies are laminates of at least one internal power core, and at least one signal core, with a layer of dielectric between.

摘要翻译： 公开了一种并行处理器封装结构和用于制造该结构的方法。 单独的逻辑和存储器元件在印刷电路卡上。 这些印刷电路板和卡依次安装在或连接到从电路化的柔性基板的层叠体向外延伸的电路化柔性基板上。 通过在层压板中实现的开关结构来提供互通。 印刷电路卡安装在或连接到多个电路化的柔性基板上，在电路化柔性电路的每一端具有一个印刷电路卡。 电路化的柔性基板通过中央层压体部分连接分开的印刷电路板和卡。 该层压部分为处理器间，存储器间，处理器间/存储器元件以及处理器到存储器总线互连和通信提供XY平面和Z轴互连。 作为逻辑芯片或存储器芯片的数据线，地址线和控制线的平面电路在通过电路化的柔性连接的各个印刷电路板和卡上，并且通过Z轴与其它柔性层通信， 轴向电路（通孔和通孔）。 各个电路化的柔性条是离散的子组件。 这些子组件是至少一个内部功率核心的层压板，以及至少一个信号芯，其间具有介电层。