METHOD AND APPARATUS FOR DETECTING ELECTRICAL IDLE
    1.
    发明申请
    METHOD AND APPARATUS FOR DETECTING ELECTRICAL IDLE 有权
    检测电器的方法和装置

    公开(公告)号:US20100153589A1

    公开(公告)日:2010-06-17

    申请号:US12335705

    申请日:2008-12-16

    IPC分类号: G06F3/00

    摘要: A system and method for detecting electrical idle in a receiver is disclosed herein. A receiver includes a differential receiver, an analog idle detector, and a first filter. The differential receiver receives a variable rate differential signal. The analog idle detector is coupled to the differential receiver. The analog idle detector provides a first idle signal that erroneously identifies a differential signal electrical idle state. The first filter is coupled to the analog idle detector. The first filter processes the first idle signal and generates a second idle signal lacking the idle state errors of the first idle signal. The first filter provides the second idle signal to receiver control logic that controls signal reception.

    摘要翻译: 本文公开了一种用于检测接收机中的电空闲的系统和方法。 接收机包括差分接收器,模拟空闲检测器和第一滤波器。 差分接收器接收可变速率差分信号。 模拟空闲检测器耦合到差分接收器。 模拟空闲检测器提供错误地识别差分信号电空闲状态的第一空闲信号。 第一滤波器耦合到模拟空闲检测器。 第一滤波器处理第一空闲信号并产生缺少第一空闲信号的空闲状态错误的第二空闲信号。 第一个滤波器将第二空闲信号提供给控制信号接收的接收器控制逻辑。

    CLOCK SIGNALS FOR DYNAMIC RECONFIGURATION OF COMMUNICATION LINK BUNDLES
    3.
    发明申请
    CLOCK SIGNALS FOR DYNAMIC RECONFIGURATION OF COMMUNICATION LINK BUNDLES 有权
    用于动态重新通信链路组的时钟信号

    公开(公告)号:US20110246810A1

    公开(公告)日:2011-10-06

    申请号:US13133372

    申请日:2008-12-16

    IPC分类号: G06F1/08

    摘要: In at least some embodiments, an electronic device includes a processor and a memory coupled to the processor. The electronic device also includes a serial communication link controller coupled to the processor, the serial communication link controller supporting dynamic reconfiguration of a plurality of communication link bundles. The serial communication link controller receives an input clock and generates first and second clock signals based on the input clock, the first and second clock signals having different clock rates and being provided to each of a plurality of communication link bundles.

    摘要翻译: 在至少一些实施例中,电子设备包括处理器和耦合到处理器的存储器。 电子设备还包括耦合到处理器的串行通信链路控制器,串行通信链路控制器支持多个通信链路束的动态重新配置。 串行通信链路控制器接收输入时钟,并且基于输入时钟产生第一和第二时钟信号,第一和第二时钟信号具有不同的时钟速率并被提供给多个通信链路束中的每一个。

    Method and apparatus for loopback self testing
    4.
    发明授权
    Method and apparatus for loopback self testing 有权
    环回自检的方法和装置

    公开(公告)号:US07992058B2

    公开(公告)日:2011-08-02

    申请号:US12335728

    申请日:2008-12-16

    CPC分类号: G06F11/2733

    摘要: A system and method for loopback self testing. A system includes a host device and an endpoint device. The host device transmits unencoded test symbols. The endpoint device loops back the unencoded test symbols to the host device. The host device drives at least some bits of each unencoded test symbol onto host device data signals and drives at least some bits of each unencoded test symbol onto host device control signals.

    摘要翻译: 一种用于环回自检的系统和方法。 系统包括主机设备和端点设备。 主机设备发送未编码的测试符号。 端点设备将未编码的测试符号循环回主机设备。 主机设备将每个未编码的测试符号的至少一些位驱动到主机设备数据信号上,并将每个未编码的测试符号的至少一些位驱动到主机设备控制信号上。

    Clock signals for dynamic reconfiguration of communication link bundles
    5.
    发明授权
    Clock signals for dynamic reconfiguration of communication link bundles 有权
    用于动态重新配置通信链路束的时钟信号

    公开(公告)号:US08930742B2

    公开(公告)日:2015-01-06

    申请号:US13133372

    申请日:2008-12-16

    IPC分类号: G06F1/00 G06F1/10 G06F1/04

    摘要: In at least some embodiments, an electronic device includes a processor and a memory coupled to the processor. The electronic device also includes a serial communication link controller coupled to the processor, the serial communication link controller supporting dynamic reconfiguration of a plurality of communication link bundles. The serial communication link controller receives an input clock and generates first and second clock signals based on the input clock, the first and second clock signals having different clock rates and being provided to each of a plurality of communication link bundles.

    摘要翻译: 在至少一些实施例中,电子设备包括处理器和耦合到处理器的存储器。 电子设备还包括耦合到处理器的串行通信链路控制器,串行通信链路控制器支持多个通信链路束的动态重新配置。 串行通信链路控制器接收输入时钟,并且基于输入时钟产生第一和第二时钟信号,第一和第二时钟信号具有不同的时钟速率并被提供给多个通信链路束中的每一个。

    Method and apparatus for detecting electrical idle
    6.
    发明授权
    Method and apparatus for detecting electrical idle 有权
    检测电气闲置的方法和装置

    公开(公告)号:US08184758B2

    公开(公告)日:2012-05-22

    申请号:US12335705

    申请日:2008-12-16

    IPC分类号: H04L7/02 G06F1/32

    摘要: A system and method for detecting electrical idle in a receiver is disclosed herein. A receiver includes a differential receiver, an analog idle detector, and a first filter. The differential receiver receives a variable rate differential signal. The analog idle detector is coupled to the differential receiver. The analog idle detector provides a first idle signal that erroneously identifies a differential signal electrical idle state. The first filter is coupled to the analog idle detector. The first filter processes the first idle signal and generates a second idle signal lacking the idle state errors of the first idle signal. The first filter provides the second idle signal to receiver control logic that controls signal reception.

    摘要翻译: 本文公开了一种用于检测接收机中的电空闲的系统和方法。 接收机包括差分接收器,模拟空闲检测器和第一滤波器。 差分接收器接收可变速率差分信号。 模拟空闲检测器耦合到差分接收器。 模拟空闲检测器提供错误地识别差分信号电空闲状态的第一空闲信号。 第一滤波器耦合到模拟空闲检测器。 第一滤波器处理第一空闲信号并产生缺少第一空闲信号的空闲状态错误的第二空闲信号。 第一个滤波器将第二空闲信号提供给控制信号接收的接收器控制逻辑。

    METHOD AND APPARATUS FOR LOOPBACK SELF TESTING
    7.
    发明申请
    METHOD AND APPARATUS FOR LOOPBACK SELF TESTING 有权
    用于环路自检的方法和装置

    公开(公告)号:US20100153799A1

    公开(公告)日:2010-06-17

    申请号:US12335728

    申请日:2008-12-16

    IPC分类号: G06F11/273

    CPC分类号: G06F11/2733

    摘要: A system and method for loopback self testing. A system includes a host device and an endpoint device. The host device transmits unencoded test symbols. The endpoint device loops back the unencoded test symbols to the host device. The host device drives at least some bits of each unencoded test symbol onto host device data signals and drives at least some bits of each unencoded test symbol onto host device control signals.

    摘要翻译: 一种用于环回自检的系统和方法。 系统包括主机设备和端点设备。 主机设备发送未编码的测试符号。 端点设备将未编码的测试符号循环回主机设备。 主机设备将每个未编码的测试符号的至少一些位驱动到主机设备数据信号上,并将每个未编码的测试符号的至少一些位驱动到主机设备控制信号上。