Circuit arrangement for the control of a digitally settable load
    1.
    发明授权
    Circuit arrangement for the control of a digitally settable load 失效
    用于控制数字可设置负载的电路布置

    公开(公告)号:US4220849A

    公开(公告)日:1980-09-02

    申请号:US909270

    申请日:1978-05-24

    申请人: Peter Harzer

    发明人: Peter Harzer

    IPC分类号: H03J5/02 G06M3/14

    CPC分类号: H03J5/0245

    摘要: A manually operated direct-current generator, with an output voltage whose polarity and magnitude depend on the direction and speed of rotation of a control knob, charges a storage capacitor in an input circuit of an operational amplifier which works into two comparators respectively responsive to positive and negative voltages exceeding selected thresholds. A triggerable pulse source, upon actuation by either comparator, feeds back one or more discharge pulses to the storage capacitor and also steps a reversible pulse counter in either a forward or a reverse sense.

    摘要翻译: 具有输出电压的手动操作的直流发电机,其极性和幅度取决于控制旋钮的旋转方向和速度,对运算放大器的输入电路中的存储电容器进行充电,该运算放大器分别响应于正的 负电压超过选定的阈值。 一个可触发的脉冲源,在由任一比较器驱动时,将一个或多个放电脉冲反馈到存储电容器,并且还可以以正向或反向的方式对可逆脉冲计数器进行步进。

    Digital settable frequency generator with phase-locking loop

    公开(公告)号:US4020425A

    公开(公告)日:1977-04-26

    申请号:US670714

    申请日:2976-03-26

    IPC分类号: H03L7/183 H03L7/23 H03B3/04

    CPC分类号: H03L7/183 H03L7/23

    摘要: A digitally settable frequency generator comprises a master oscillator whose operating frequency f.sub.Q is variable between a normal value f.sub.Q " and a slightly lower value f.sub.Q ' = (1-p)f.sub.Q " with the aid of a normally disconnected tuning capacitor. The master oscillator works into a frequency divider of fixed step-down ratio m:1 (or 2m:1) to produce a reference frequency f.sub.B. A slave oscillator, generating an output frequency f.sub.A = gf.sub.B, is controlled by a phase-locking loop including a phase comparator to which the reference frequency f.sub.B is fed along with a like frequency obtained from output frequency f.sub.A with the aid of another divider having a digitally variable integral step-down ratio g:1. A fractional value i, which may range from 0 to 100%, is set with the aid of a numerical interpolation selector to determine the number n

    Method of and system for visually displaying several periodically
reproducible input signals
    3.
    发明授权
    Method of and system for visually displaying several periodically reproducible input signals 失效
    用于可视地显示几个周期性可重现的输入信号的方法和系统

    公开(公告)号:US4020392A

    公开(公告)日:1977-04-26

    申请号:US699258

    申请日:1976-06-24

    IPC分类号: G01R13/28 H01J29/52

    CPC分类号: G01R13/28

    摘要: Two (or more) periodically reproducible input signals V.sub.yI, V.sub.yII, possibly including a constant reference signal, are visually displayed on an oscilloscope screen with the aid of a normally suppressed electron beam under the control of a horizontal-sweep generator and a vertical-sweep generator producing a sinusoidal x-deflection and y-deflection signals V.sub.xR and V.sub.yR, respectively. The x-deflection signal V.sub.xR is continuously compared with two (or more) ramp signals V.sub.xI and V.sub.xII, of different periodicities substantially lower than the frequencies of the deflection signals, respectively assigned to the input signals V.sub.yI, V.sub.yII to be displayed; upon the occurrence of a coincidence with one of these ramp signals, the horizontal sweep is halted or slowed down -- preferably to the slope of the coincident ramp signal -- for a display interval equaling one cycle of the y-deflection signal V.sub.yR which at some point during this interval matches the corresponding input signal. At that point the beam is turned on to illuminate the screen for the remainder of the display interval, thereby tracing a short section of the input signal concerned.

    摘要翻译: 借助于在水平扫描发生器和垂直扫描的控制下的正常被抑制的电子束,在示波器屏幕上可视地显示两个(或更多个)周期性可再现的输入信号VyI,VyII,可能包括恒定的参考信号 发生器分别产生正弦X偏转和Y偏转信号VxR和VyR。 x偏转信号VxR与分别分配给要显示的输入信号VyI,VyII的偏转信号的频率的不同周期的两个(或多个)斜坡信号VxI和VxII连续地进行比较; 在与这些斜坡信号中的一个发生一致时,水平扫描被停止或减慢 - 优选地相对于重合斜坡信号的斜率 - 对于等于y偏转信号VyR的一个周期的显示间隔,其在某一点 在此间隔期间匹配相应的输入信号。 在这一点上,光束被打开以在显示间隔的剩余时间内照亮屏幕,从而跟踪相关输入信号的一小段。

    Low-noise digitally tunable phase-locked loop frequency generator
    4.
    发明授权
    Low-noise digitally tunable phase-locked loop frequency generator 失效
    低噪声数字可调锁相环频率发生器

    公开(公告)号:US4514705A

    公开(公告)日:1985-04-30

    申请号:US328656

    申请日:1981-12-08

    申请人: Peter Harzer

    发明人: Peter Harzer

    IPC分类号: H03L7/23 H03L7/08 H03L7/18

    CPC分类号: H03L7/23

    摘要: A variable-frequency main oscillator of digitally tunable high output frequency f.sub.A is controlled by the integrated output voltage of a phase discriminator receiving on the one hand a relatively low comparison frequency and on the other hand a matching feedback frequency stepped down from output frequency f.sub.A by frequency division or by heterodyning with an auxiliary frequency f.sub.H of the same order of magnitude from an ancillary oscillator, a difference frequency f.sub.D =f.sub.A -f.sub.H is fed to a frequency discriminator delivering a corrective voltage, independent of that emitted by the phase discriminator through a filter network, to the control input of the main oscillator. A pair of frequency selectors varying the feedback frequency and/or the comparison frequency enable the output frequency f.sub.A to be adjusted in coarse and fine tuning steps, the coarse adjustments being also applied to the auxiliary frequency f.sub.H to limit the excursions of the difference frequency f.sub.D. In order to minimize shifts in the corrective voltage due to changes in the setting of the fine-tuning selector, a digital command generated by that selector is converted into an analog compensating voltage subtracted from the output voltage of the frequency discriminator.

    摘要翻译: 数字可调高输出频率fA的可变频率主振荡器由相位鉴别器的集成输出电压控制,一方面接收相对较低的比较频率,另一方面由输出频率fA降低的匹配反馈频率由 频率分频或与辅助振荡器具有相同数量级的辅助频率fH的外差,将差频fD = fA-fH馈送到传送校正电压的频率鉴别器,与由鉴相器通过一个 滤波网络,到主振荡器的控制输入。 改变反馈频率和/或比较频率的一对频率选择器使得可以在粗调和微调步骤中调整输出频率fA,粗调也被施加到辅助频率fH以限制差频fD的偏移 。 为了最小化由于微调选择器的设定变化导致的校正电压偏移,由该选择器产生的数字命令被转换成从鉴频器的输出电压中减去的模拟补偿电压。

    Digitally settable frequency generator
    5.
    发明授权
    Digitally settable frequency generator 失效
    数字可设定频率发生器

    公开(公告)号:US4191930A

    公开(公告)日:1980-03-04

    申请号:US941955

    申请日:1978-09-13

    申请人: Peter Harzer

    发明人: Peter Harzer

    IPC分类号: H03B23/00 H03L7/23 H03B3/06

    CPC分类号: H03L7/23 H03B23/00

    摘要: A frequency generator of the digitally settable type comprises several voltage-controlled oscillators, specifically a pair of pilot oscillators and a final oscillator, provided with respective phase-locking loops each including a phase discriminator. The loops of the pilot oscillators further include respective frequency dividers whose step-down ratios are controlled by setting commands stored in associated memories which can be reloaded, under the control of manually or automatically adjustable selectors, only in the presence of an enabling pulse generated by a coincidence circuit with inputs connected to the outputs of a source of reference frequency and of the several stages of a chain of binary dividers connected to that source, certain of these stage outputs delivering comparison frequencies to the phase discriminators fed by the frequency dividers of the pilot oscillators. The phase discriminator associated with the final oscillator has one input connected to a mixer and another input connected to one of the pilot oscillators, the mixer receiving operating frequencies of the other pilot oscillator and of the final oscillator. A timing device such as a monoflop may be triggered by the enabling pulses for temporarily disabling the final phase discriminator, or restricting its dynamic range, to suppress fluctuations in the output frequency due to transient oscillator instability. The emission of such inhibiting pulses may be limited to switching operations involving both pilot oscillators, as upon the occurrence of a denominational carry.

    摘要翻译: 数字可设置型的频率发生器包括几个电压控制振荡器,特别是一对导频振荡器和最终振荡器,其中设置有各自的相位锁定回路,每个锁相环包括相位鉴别器。 导频振荡器的环路还包括各自的分频器,它们的降压比例是通过在手动或自动调节的选择器的控制下,通过设置存储在可重新加载的相关存储器中的命令来控制的,只有存在由 具有连接到参考频率源和连接到该源的二进制分频器链的几个级的输出的输入的符合电路,这些级输出中的某些级输出将比较频率提供给由分频器的分频器馈送的相位鉴别器 导频振荡器。 与最终振荡器相关联的相位鉴相器具有连接到混频器的一个输入端和连接到导频振荡器之一的另一输入端,混频器接收另一导频振荡器和最终振荡器的工作频率。 诸如单稳态的定时装置可以由使能脉冲触发,用于暂时禁用最终鉴相器或限制其动态范围,以抑制由于瞬态振荡器不稳定性引起的输出频率的波动。 这种抑制脉冲的发射可能被限制为涉及两个导频振荡器的开关操作,如在发生分支携带时。

    Process and circuit arrangement for the measuring of coefficients of
message-transmission equipment
    6.
    发明授权
    Process and circuit arrangement for the measuring of coefficients of message-transmission equipment 失效
    消息传输设备系数测量的过程和电路布置

    公开(公告)号:US4287469A

    公开(公告)日:1981-09-01

    申请号:US47927

    申请日:1979-06-12

    申请人: Peter Harzer

    发明人: Peter Harzer

    CPC分类号: G01R27/28 H04B3/46

    摘要: A test object, such as a communication path used for data transmission, is examined by applying to its input a measuring signal M consisting of several simultaneously or sequentially generated test frequencies which may be harmonically interrelated, extracting from the output of the test object a distorted version E of the measuring signal, locally generating a compensation signal K with frequency components matching respective test frequencies, and subtracting the two signals E and K from each other to obtain a residual signal R=E-K. The compensation signal K is produced by one or more local oscillators and as many frequency converters under the control of regenerating circuitry which locks each of its components in phase and amplitude to the corresponding test frequency. Regeneration takes place in a different frequency range to which the residual signal R is transposed and from which the compensation signal K is retransposed with the aid of a locally generated carrier. Various transmission coefficients can be derived from the three signals R, E, K as well as from control voltages produced in the regenerating circuitry for the amplitude lock.

    摘要翻译: 通过向其输入端应用测试对象,例如用于数据传输的通信路径,通过向其输入应用由几个同时或顺序产生的测试频率组成的测量信号M,该测试信号可以是谐波相关的,从测试对象的输出提取失真 测量信号的版本E,本地产生具有与各测试频率匹配的频率分量的补偿信号K,并且相互减去两个信号E和K以获得残差信号R = EK。 补偿信号K由一个或多个本地振荡器产生,并且在再生电路的控制下由多个变频器产生,该再生电路将其相位和幅度中的每个分量锁定到相应的测试频率。 再生发生在残留信号R被转置到的不同的频率范围内,借助于本地产生的载波从补偿信号K重新发送。 可以从三个信号R,E,K以及用于振幅锁定的再生电路中产生的控制电压导出各种传输系数。

    Method of and system for metering a periodically varying voltage
    7.
    发明授权
    Method of and system for metering a periodically varying voltage 失效
    测量周期性变化电压的方法和系统

    公开(公告)号:US4075558A

    公开(公告)日:1978-02-21

    申请号:US720785

    申请日:1976-09-07

    申请人: Peter Harzer

    发明人: Peter Harzer

    IPC分类号: G01R19/22 G01R17/06

    CPC分类号: G01R19/22

    摘要: The average amplitude of an incoming signal voltage of variable frequency is measured by half-wave rectification of that signal voltage to produce a pulsating current which is subtracted from a continuous current in the input of an integrating amplifier. The fluctuating output voltage of this amplifier is periodically sampled, once per cycle of the signal voltage, to provide a train of corrective pulses. These pulses are accumulated to provide a reference voltage fed to a differential amplifier which controls the continuous current in response to differences between this reference voltage and a feedback voltage proportional to that current to compensate for changes in average signal amplitude. The magnitude of the continuous current, read by a meter, is therefore a measure of the desired amplitude. The voltage samples may be weighted, in proportion to signal frequency, by a variable-gain amplifier or a sampling switch closed for different periods in the output of the integrating amplifier referred to. A second integrating amplifier, in cascade with the first one, may receive the voltage samples and store them on one of two series-connected condensers in its feedback circuit, the other of these condensers being periodically discharged and serving only to accelerate the response of the system to changes in amplitude and/or frequency of the input voltage.