Methods and apparatus for performing calculations using reduced-width data
    1.
    发明授权
    Methods and apparatus for performing calculations using reduced-width data 有权
    使用缩减宽度数据进行计算的方法和装置

    公开(公告)号:US07555508B2

    公开(公告)日:2009-06-30

    申请号:US11657300

    申请日:2007-01-24

    CPC classification number: G06F7/552 G06F7/483 G06F2207/5523

    Abstract: Methods, apparatus, and articles of manufacture for performing calculations using reduced-width data are disclosed. In particular, an example method determines reduced-width data values associated with generating and evaluating functions. Some of the reduced-width data values are stored within instructions in an instruction memory during a compile phase and retrieved from instruction memory during a runtime phase.

    Abstract translation: 公开了使用缩减宽度数据执行计算的方法,装置和制品。 特别地,示例性方法确定与生成和评估功能相关联的缩小宽度数据值。 一些缩减宽度数据值在编译阶段存储在指令存储器中的指令中,并在运行阶段期间从指令存储器中检索。

    Enhanced fused multiply-add operation
    2.
    发明授权
    Enhanced fused multiply-add operation 有权
    增强融合乘法运算

    公开(公告)号:US07499962B2

    公开(公告)日:2009-03-03

    申请号:US11019921

    申请日:2004-12-21

    CPC classification number: G06F7/5443 G06F7/483

    Abstract: An apparatus, method, and system for performing an enhanced fused multiply-add operation is disclosed. In one embodiment, an apparatus includes an exponent unit. The exponent unit includes a first adder to generate S1, where S1 is the sum of an integer k, the exponent of a floating point value A, and the exponent of a floating point value B. The exponent unit also includes a comparator to generate E1, where E1 is the greater of S1 and the exponent of a floating point value C. The apparatus also includes a partial multiplier, a shifter, and a second adder. The partial multiplier generates the partial products of the mantissas of A and B. The shifter aligns the partial products and the mantissa of C, based on E1. The second adder adds the aligned partial products and the mantissa of C. The apparatus is able to generate not only (A*B+C), but is enhanced to also be able to generate (2k*A*B+C) and the closest integer to (2k*A*B) in two's complement or floating point format.

    Abstract translation: 公开了一种用于执行增强的融合乘法运算的装置,方法和系统。 在一个实施例中,装置包括指数单元。 指数单元包括产生S1的第一加法器,其中S1是整数k,浮点值A的指数和浮点值B的指数之和。指数单元还包括产生E1的比较器 其中E1是S1中的较大者和浮点值C的指数。该装置还包括部分乘法器,移位器和第二加法器。 部分乘法器产生A和B的尾数的部分乘积。移位器基于E1对齐部分乘积和C的尾数。 第二个加法器将对齐的部分积和C的尾数相加。该装置能够不仅产生(A * B + C),而且能够增强也能够生成(2k * A * B + C)和 最接近的整数(2k * A * B)为二进制补码或浮点格式。

    Methods and apparatus for performing calculations using reduced-width data
    3.
    发明授权
    Methods and apparatus for performing calculations using reduced-width data 有权
    使用缩减宽度数据进行计算的方法和装置

    公开(公告)号:US08275819B2

    公开(公告)日:2012-09-25

    申请号:US12492961

    申请日:2009-06-26

    CPC classification number: G06F7/552 G06F7/483 G06F2207/5523

    Abstract: Methods, apparatus, and articles of manufacture for performing calculations using reduced-width data are disclosed. In particular, an example method determines reduced-width data values associated with generating and evaluating functions. Some of the reduced-width data values are stored within instructions in an instruction memory during a compile phase and retrieved from instruction memory during a runtime phase.

    Abstract translation: 公开了使用缩减宽度数据执行计算的方法,装置和制品。 特别地,示例性方法确定与生成和评估功能相关联的缩小宽度数据值。 一些缩减宽度数据值在编译阶段存储在指令存储器中的指令中,并在运行阶段期间从指令存储器中检索。

    Methods and apparatus for performing calculations using reduced-width data
    4.
    发明授权
    Methods and apparatus for performing calculations using reduced-width data 有权
    使用缩减宽度数据进行计算的方法和装置

    公开(公告)号:US07457838B2

    公开(公告)日:2008-11-25

    申请号:US10726828

    申请日:2003-12-03

    CPC classification number: G06F7/552 G06F7/483 G06F2207/5523

    Abstract: Methods, apparatus, and articles of manufacture for performing calculations using reduced-width data are disclosed. In particular, an example method determines reduced-width data values associated with generating and evaluating functions. Some of the reduced-width data values are stored within instructions in an instruction memory during a compile phase and retrieved from instruction memory during a runtime phase.

    Abstract translation: 公开了使用缩减宽度数据执行计算的方法,装置和制品。 特别地,示例性方法确定与生成和评估功能相关联的缩小宽度数据值。 一些缩减宽度数据值在编译阶段存储在指令存储器中的指令中,并在运行阶段期间从指令存储器中检索。

    Narrow data path for very high radix division
    5.
    发明授权
    Narrow data path for very high radix division 失效
    狭窄的数据路径,用于非常高的基数

    公开(公告)号:US07167891B2

    公开(公告)日:2007-01-23

    申请号:US10394952

    申请日:2003-03-21

    CPC classification number: G06F7/535

    Abstract: Methods, machines, and systems are provided for very high radix division using narrow data paths. A numerator and denominator are received for a very high radix division calculation. An approximate reciprocal of the denominator is obtained from a data structure. The numerator and denominator are pre-scaled by the reciprocal. The denominator is decomposed to an equivalent expression that results in a number of leading insignificant values. Next, modifying a current remainder by forming a first product and subtracting the equivalent expression iteratively assembles a quotient.

    Abstract translation: 提供了使用窄数据路径进行非常高的基数分割的方法,机器和系统。 接收到一个非常高的基数分数计算的分子和分母。 从数据结构获得分母的近似倒数。 分子和分母通过倒数进行预缩放。 分母被分解成等效的表达式,导致许多领先的无关紧要的值。 接下来,通过形成第一乘积来修改当前的余数并减去等价表达式迭代地组合商。

    Methods and apparatus for extracting integer remainders
    7.
    发明授权
    Methods and apparatus for extracting integer remainders 有权
    用于提取整数余数的方法和装置

    公开(公告)号:US07979486B2

    公开(公告)日:2011-07-12

    申请号:US11946593

    申请日:2007-11-28

    CPC classification number: G06F7/535 G06F7/72 G06F2207/5356

    Abstract: Methods and apparatus to determine a remainder value are disclosed. A disclosed example method involves, during a compilation phase, causing a processor to multiply a dividend value by a first value to generate a second value associated with a product. The first value is associated with a scaled approximate reciprocal of a divisor value, and the scaled approximate reciprocal of the divisor value is determined using a compound exponent value. During a runtime phase, the processor is caused to multiply a third value from the second value. The third value is generated using at least a subset bitfield of the second value. During the runtime phase, the processor is caused to determine a remainder value based on the third value. The processor is caused to store the remainder value in a memory.

    Abstract translation: 公开了确定余数值的方法和装置。 所公开的示例性方法涉及在编译阶段期间使处理器将分红值乘以第一值以生成与产品相关联的第二值。 第一个值与除数值的缩放近似倒数相关联,并且使用复合指数值确定除数值的缩放近似倒数。 在运行阶段期间,使处理器从第二个值乘以第三个值。 使用第二值的至少子集位字段来生成第三值。 在运行阶段期间,使处理器基于第三值来确定余数值。 使处理器将余数值存储在存储器中。

    METHODS AND APPARATUS FOR PERFORMING CALCULATIONS USING REDUCED-WIDTH DATA
    8.
    发明申请
    METHODS AND APPARATUS FOR PERFORMING CALCULATIONS USING REDUCED-WIDTH DATA 有权
    使用减少宽度数据执行计算的方法和装置

    公开(公告)号:US20090265408A1

    公开(公告)日:2009-10-22

    申请号:US12492961

    申请日:2009-06-26

    CPC classification number: G06F7/552 G06F7/483 G06F2207/5523

    Abstract: Methods, apparatus, and articles of manufacture for performing calculations using reduced-width data are disclosed. In particular, an example method determines reduced-width data values associated with generating and evaluating functions. Some of the reduced-width data values are stored within instructions in an instruction memory during a compile phase and retrieved from instruction memory during a runtime phase.

    Abstract translation: 公开了使用缩减宽度数据执行计算的方法,装置和制品。 特别地,示例性方法确定与生成和评估功能相关联的缩小宽度数据值。 一些缩减宽度数据值在编译阶段存储在指令存储器中的指令中,并在运行阶段期间从指令存储器中检索。

    Methods and apparatus for determining approximating polynomials using instruction-embedded coefficients
    9.
    发明授权
    Methods and apparatus for determining approximating polynomials using instruction-embedded coefficients 失效
    使用指令嵌入系数确定近似多项式的方法和装置

    公开(公告)号:US07325022B2

    公开(公告)日:2008-01-29

    申请号:US10648500

    申请日:2003-08-26

    CPC classification number: G06F7/552 G06F9/30014 G06F9/3016 G06F2207/5523

    Abstract: Methods and apparatus for determining approximating polynomials using instruction-embedded coefficients are disclosed. In particular, the methods and apparatus use a plurality of coefficient values stored in a plurality of instructions. The coefficient values are associated with a runtime approximating polynomial of a K-th root family function. The coefficient values and the instructions stored in an instruction memory enable the processor system to determine a K-th root family function approximation value based on the runtime approximating polynomial.

    Abstract translation: 公开了使用指令嵌入系数确定近似多项式的方法和装置。 特别地,所述方法和装置使用存储在多个指令中的多个系数值。 系数值与第K个根系函数的运行时近似多项式相关联。 存储在指令存储器中的系数值和指令使得处理器系统能够基于运行时近似多项式来确定第K个根系函数近似值。

    Methods and apparatus for extracting integer remainders
    10.
    发明授权
    Methods and apparatus for extracting integer remainders 失效
    用于提取整数余数的方法和装置

    公开(公告)号:US07321916B2

    公开(公告)日:2008-01-22

    申请号:US10628811

    申请日:2003-07-28

    CPC classification number: G06F7/535 G06F7/72 G06F2207/5356

    Abstract: Methods and apparatus for determining a remainder value are disclosed. The methods and apparatus extract a residuary subset bitfield value from a binary value that is calculated using a scaled approximate reciprocal value that is associated with a compound exponent scaling value. The residuary subset bitfield value is part of a range of contiguous bits that is associated with upper and lower boundary bit-position values that are part of the compound exponent scaling value. The methods and apparatus determine the remainder value based on the residuary subset bitfield value.

    Abstract translation: 公开了用于确定余数值的方法和装置。 方法和装置从使用与复合指数缩放值相关联的缩放近似倒数值计算的二进制值提取剩余子集位域值。 剩余子集位字段值是与作为复合指数缩放值的一部分的上边界位和下边界位值相关联的连续位的范围的一部分。 方法和装置基于剩余子集位域值来确定余数值。

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