公开(公告)号：US08633767B2

公开(公告)日：2014-01-21

申请号：US13220650

申请日：2011-08-29

申请人： Chin-Fu Li ,  Guan-Hong Ke ,  Shih-Chieh Chou ,  Po-Chiun Huang

发明人： Chin-Fu Li ,  Guan-Hong Ke ,  Shih-Chieh Chou ,  Po-Chiun Huang

IPC分类号： H03G3/20 ,  H03F1/14

CPC分类号： H03F3/193 ,  H03F3/3028 ,  H03F3/45197 ,  H03F3/45659 ,  H03F2200/294 ,  H03F2203/45418 ,  H03F2203/45504

摘要： An amplifier circuit includes an amplifier and a noise suppression block. The amplifier is arranged for receiving an input signal at an input port and generating an output signal at an output port according to the input signal. The noise suppression block is coupled between the input port and the output port of the amplifier, and arranged for receiving the input signal and the output signal and applying noise suppression to the output signal generated from the amplifier according to the received input signal and the received output signal.

摘要翻译： 放大器电路包括放大器和噪声抑制块。 放大器布置成在输入端口处接收输入信号，并根据输入信号在输出端口产生输出信号。 噪声抑制块耦合在放大器的输入端口和输出端口之间，并且被布置成用于接收输入信号和输出信号，并根据接收到的输入信号和接收到的输出信号对放大器产生的输出信号施加噪声抑制 输出信号。

公开(公告)号：US20130051496A1

公开(公告)日：2013-02-28

申请号：US13219729

申请日：2011-08-29

申请人： Chin-Fu LI ,  Guan-Hong KE ,  Po-Min WANG ,  Po-Chiun HUANG

发明人： Chin-Fu LI ,  Guan-Hong KE ,  Po-Min WANG ,  Po-Chiun HUANG

IPC分类号： H04L27/14 ,  H04B1/26

CPC分类号： H04B1/28

摘要： A single-phase down-converter includes a mixer and a local oscillator (LO) signal generator. The mixer is arranged to generate a mixer output signal by mixing a radio frequency (RF) signal and an LO signal. The LO signal generator is coupled to the mixer, and arranged to generate the LO signal with a frequency shifted from an RF carrier frequency by a specific intermediate frequency, wherein when image interference exists, the specific intermediate frequency makes the image interference translated to guard band(s) of channel(s).

摘要翻译： 单相下变频器包括混频器和本地振荡器（LO）信号发生器。 混频器被布置成通过混合射频（RF）信号和LO信号来产生混频器输出信号。 LO信号发生器耦合到混频器，并且被布置为产生具有从RF载波频率偏移特定中频的LO信号，其中当存在图像干扰时，特定中频使图像干扰被转换为保护带 （一个或多个）通道。

公开(公告)号：US07923979B2

公开(公告)日：2011-04-12

申请号：US11923191

申请日：2007-10-24

申请人： Po Chiun Huang ,  Chun Yen Tseng

发明人： Po Chiun Huang ,  Chun Yen Tseng

IPC分类号： G01F1/00

CPC分类号： B23K11/258

摘要： A control system for dynamically adjusting an output voltage of a voltage converter includes a signal calculation circuit, a pulse width modulator, a voltage converter, a nonlinear calibration circuit and a signal converter. The signal calculation circuit, the pulse width modulator, the voltage converter and the signal converter form a long-tail loop. The signal calculation circuit simultaneously receives a target value and a detection value from the signal converter to generate an error value for adjusting the output of the pulse width modulator. The voltage converter and the nonlinear calibration circuit form a local pulse-squashing loop. Pulse widths of an input signal to the voltage converter can be timely and effectively calibrated and controlled, thereby decreasing power consumption of the voltage converter and providing an effective protective mechanism.

摘要翻译： 用于动态地调节电压转换器的输出电压的控制系统包括信号计算电路，脉冲宽度调制器，电压转换器，非线性校准电路和信号转换器。 信号计算电路，脉宽调制器，电压转换器和信号转换器形成长尾循环。 信号计算电路同时从信号转换器接收目标值和检测值，以产生用于调整脉宽调制器的输出的误差值。 电压转换器和非线性校准电路形成局部脉冲压缩回路。 可以及时有效地校准和控制到电压转换器的输入信号的脉冲宽度，从而降低电压转换器的功耗并提供有效的保护机制。

公开(公告)号：US20080224683A1

公开(公告)日：2008-09-18

申请号：US11923191

申请日：2007-10-24

申请人： Po Chiun Huang ,  Chun Yen Tseng

发明人： Po Chiun Huang ,  Chun Yen Tseng

IPC分类号： B23K11/24

CPC分类号： B23K11/258

摘要： A control system for dynamically adjusting an output voltage of a voltage converter includes a signal calculation circuit, a pulse width modulator, a voltage converter, a nonlinear calibration circuit and a signal converter. The signal calculation circuit, the pulse width modulator, the voltage converter and the signal converter form a long-tail loop. The signal calculation circuit simultaneously receives a target value and a detection value from the signal converter to generate an error value for adjusting the output of the pulse width modulator. The voltage converter and the nonlinear calibration circuit form a local pulse-squashing loop. Pulse widths of an input signal to the voltage converter can be timely and effectively calibrated and controlled, thereby decreasing power consumption of the voltage converter and providing an effective protective mechanism.

摘要翻译： 用于动态地调节电压转换器的输出电压的控制系统包括信号计算电路，脉冲宽度调制器，电压转换器，非线性校准电路和信号转换器。 信号计算电路，脉宽调制器，电压转换器和信号转换器形成长尾循环。 信号计算电路同时从信号转换器接收目标值和检测值，以产生用于调整脉宽调制器的输出的误差值。 电压转换器和非线性校准电路形成局部脉冲压缩回路。 可以及时有效地校准和控制到电压转换器的输入信号的脉冲宽度，从而降低电压转换器的功耗并提供有效的保护机制。

公开(公告)号：US07142138B2

公开(公告)日：2006-11-28

申请号：US11203388

申请日：2005-08-12

申请人： Chieh-Hung Chen ,  Yi-Chung Chen ,  Po-Chiun Huang

发明人： Chieh-Hung Chen ,  Yi-Chung Chen ,  Po-Chiun Huang

IPC分类号： H03M1/10

CPC分类号： H03M1/1004 ,  H03M1/1038 ,  H03M1/167

摘要： The present invention discloses an on-line calibration method, which utilizes two calibration algorithms running in the background without interrupting the normal operation of the analog signal process. The method includes performing a residue amplifier gain error calibration and performing a DAC non-linearity calibration. The residue amplifier gain error calibration can reduce the gain error of the residue amplifier for a missing code or a missing decision level phenomenon. The DAC non-linearity calibration can relax the matching requirement of passive components in current semiconductor processes. The present invention discloses a two-step ADC (Analog-to-Digital Converter), which includes a first signal processing unit, a second signal processing unit, a programmable gain control unit and a programmable reference voltage generator, performing the on-line calibration method.

公开(公告)号：US06853323B1

公开(公告)日：2005-02-08

申请号：US10838754

申请日：2004-05-04

申请人： Yi-Huei Chen ,  Po-Chiun Huang ,  Chieh-Hung Chen

发明人： Yi-Huei Chen ,  Po-Chiun Huang ,  Chieh-Hung Chen

IPC分类号： H03M1/06 ,  H03M1/66 ,  H03M1/68 ,  H03M1/74

CPC分类号： H03M1/0678 ,  H03M1/685 ,  H03M1/747

摘要： A digital-to-analog converter (DAC) for use in high-speed wireless communications. The DAC of the invention comprises a plurality of current steering cells to bi-directionally provide a differential current output. When the DAC sets the differential current output to zero for example, each of the current steering cells establishes dummy branches between a pair of current sources and thereby prevents the current sources from floating. This in turn enables the DAC to operate with a higher update rate.

摘要翻译： 用于高速无线通信的数模转换器（DAC）。 本发明的DAC包括多个电流导向单元，以双向提供差分电流输出。 当DAC将差分电流输出设置为零时，每个当前导向单元在一对电流源之间建立虚拟分支，从而防止电流源浮动。 这反过来使DAC能够以更高的更新速率运行。

公开(公告)号：US5418492A

公开(公告)日：1995-05-23

申请号：US130631

申请日：1993-10-01

申请人： Chorng-Kuang Wang ,  Chen-Yi Huang ,  Po-Chiun Huang ,  Yuh-Diahn Wang

发明人： Chorng-Kuang Wang ,  Chen-Yi Huang ,  Po-Chiun Huang ,  Yuh-Diahn Wang

IPC分类号： H03F1/44 ,  H03F3/45 ,  H03H11/12 ,  H03F3/191

CPC分类号： H03F3/45103 ,  H03H11/1213 ,  H03F2203/45612 ,  H03F2203/45702 ,  H03F2203/45722

摘要： The present invention comprises a fully differential non-op-amp based BJT biquad filter. The biquad filter comprises an unity gain follower receiving a positive and a negative differential input signals for generating a positive and a negative differential output signals. The biquad filter further includes a first positive feedback line connecting the positive output signal to the positive input signal and a second positive feedback line connecting the negative output signal to the negative input signal. The first positive feedback line includes a first capacitor connected in series therein and the second positive feedback line includes a second capacitor connected in series therein wherein the first and the second capacitors are of substantially equal capacitance. The unity gain follower further comprises a plurality of bipolar NPN devices and resistors connected between a common higher DC voltage and a common lower DC voltage through a constant DC current emitter. The unity gain follower is a fully differential follower which further comprises an input voltage shifting stage for receiving and shifting the voltage level of the positive and negative input signals. The unity gain follower further includes a transconductance stage for converting the shifted voltages from the input voltage shifting stage to a positive and a negative current outputs. The unity gain follower further includes a cascode stage for receiving and processing the positive and negative current outputs responsive to the bandwidth of the current outputs to generate a positive and a negative cascoded current outputs. The unity gain follower further has a load stage for receiving the cascoded current outputs to generated a positive and a negative loading voltages. The unity gain follower further includes an output voltage shifting stage for receiving and shifting the loading voltages to generate a positive and a negative shifted output voltages. The unity gain follower further includes an output buffer stage for receiving the shifted output voltages from the output voltage shifting stage and generate a positive and a negative output voltages to provide a low output impedance to the biquad filter.

公开(公告)号：US20060208933A1

公开(公告)日：2006-09-21

申请号：US11203388

申请日：2005-08-12

申请人： Chieh-Hung Chen ,  Yi-Chung Chen ,  Po-Chiun Huang

发明人： Chieh-Hung Chen ,  Yi-Chung Chen ,  Po-Chiun Huang

IPC分类号： H03M1/10

CPC分类号： H03M1/1004 ,  H03M1/1038 ,  H03M1/167

摘要： The present invention discloses an on-line calibration method, which utilizes two calibration algorithms running in the background without interrupting the normal operation of the analog signal process. The method includes performing a residue amplifier gain error calibration and performing a DAC non-linearity calibration. The residue amplifier gain error calibration can reduce the gain error of the residue amplifier for a missing code or a missing decision level phenomenon. The DAC non-linearity calibration can relax the matching requirement of passive components in current semiconductor processes. The present invention discloses a two-step ADC (Analog-to-Digital Converter), which includes a first signal processing unit, a second signal processing unit, a programmable gain control unit and a programmable reference voltage generator, performing the on-line calibration method.

摘要翻译： 本发明公开了一种在线校准方法，其利用在后台运行的两种校准算法，而不中断模拟信号处理的正常操作。 该方法包括执行残差放大器增益误差校准并执行DAC非线性校准。 残留放大器增益误差校准可以减少残差放大器对于丢失代码或丢失的判定级别现象的增益误差。 DAC非线性校准可以放宽当前半导体工艺中无源器件的匹配要求。 本发明公开了一种两步ADC（模数转换器），其包括第一信号处理单元，第二信号处理单元，可编程增益控制单元和可编程参考电压发生器，执行在线校准 方法。

公开(公告)号：US20130049866A1

公开(公告)日：2013-02-28

申请号：US13220650

申请日：2011-08-29

申请人： Chin-Fu Li ,  Guan-Hong Ke ,  Shih-Chieh Chou ,  Po-Chiun Huang

发明人： Chin-Fu Li ,  Guan-Hong Ke ,  Shih-Chieh Chou ,  Po-Chiun Huang

IPC分类号： H03F3/16

CPC分类号： H03F3/193 ,  H03F3/3028 ,  H03F3/45197 ,  H03F3/45659 ,  H03F2200/294 ,  H03F2203/45418 ,  H03F2203/45504

摘要： An amplifier circuit includes an amplifier and a noise suppression block. The amplifier is arranged for receiving an input signal at an input port and generating an output signal at an output port according to the input signal. The noise suppression block is coupled between the input port and the output port of the amplifier, and arranged for receiving the input signal and the output signal and applying noise suppression to the output signal generated from the amplifier according to the received input signal and the received output signal.

摘要翻译： 放大器电路包括放大器和噪声抑制块。 放大器布置成在输入端口处接收输入信号，并根据输入信号在输出端口产生输出信号。 噪声抑制块耦合在放大器的输入端口和输出端口之间，并且被布置成用于接收输入信号和输出信号，并根据接收到的输入信号和接收到的输出信号对放大器产生的输出信号施加噪声抑制 输出信号。

公开(公告)号：US20060109893A1

公开(公告)日：2006-05-25

申请号：US10998122

申请日：2004-11-24

申请人： Hsin-Hung Chen ,  Jiunn-Tsair Chen ,  Young-Kai Chen ,  Po-Chiun Huang ,  Kun-Yii Tu

发明人： Hsin-Hung Chen ,  Jiunn-Tsair Chen ,  Young-Kai Chen ,  Po-Chiun Huang ,  Kun-Yii Tu

IPC分类号： H04L5/16

CPC分类号： H04L27/364 ,  H04B1/30 ,  H04L27/3863 ,  H04L2027/0016 ,  H04L2027/0022

摘要： A transceiver includes a transmitter, a receiver, and an electrical feedback line. The transmitter has a quadrature-modulator and is configurable to compensate inphase/quadrature phase imbalances produced by hardware of the transmitter. The quadrature-modulator is configured to quadrature-modulate a carrier wave. The receiver has a quadrature-demodulator and is configurable to compensate for inphase/quadrature phase imbalances produced by hardware in the receiver. The quadrature-demodulator is configured to demodulate a quadrature-demodulated carrier. The electrical feedback line connects an output of the transmitter to an input of the receiver.

摘要翻译： 收发器包括发射器，接收器和电反馈线。 发射机具有正交调制器，可配置为补偿发射机硬件产生的同相/正交相位不平衡。 正交调制器被配置为对载波进行正交调制。 接收机具有正交解调器，可配置为补偿接收机中由硬件产生的同相/正交相位不平衡。 正交解调器被配置为解调正交解调载波。 电反馈线将发射机的输出连接到接收机的输入。