公开(公告)号：US06709947B1

公开(公告)日：2004-03-23

申请号：US10314548

申请日：2002-12-06

申请人： Porshia S. Wrschka ,  Irene McStay

发明人： Porshia S. Wrschka ,  Irene McStay

IPC分类号： H01L2120

CPC分类号： H01L28/84 ,  Y10S438/964

摘要： A method and structure for increasing the area and capacitance of both trench and planar integrated circuit capacitors uses Si nodules deposited on a thin dielectric seeding layer that is absorbed during subsequent thermal processing, thereby avoiding a high resistance layer in the capacitor.

摘要翻译： 用于增加沟槽和平面集成电路电容器的面积和电容的方法和结构使用沉积在薄电介质晶种层上的Si结节，其在随后的热处理期间被吸收，从而避免了电容器中的高电阻层。

公开(公告)号：US06987042B2

公开(公告)日：2006-01-17

申请号：US10250046

申请日：2003-05-30

申请人： Jochen Beintner ,  Naim Moumen ,  Porshia S. Wrschka

发明人： Jochen Beintner ,  Naim Moumen ,  Porshia S. Wrschka

IPC分类号： H01L21/8242

CPC分类号： H01L27/1087 ,  H01L21/30604 ,  H01L29/66181 ,  H01L29/945

摘要： A method of forming collar isolation for a trench storage memory cell structure is provided in which amorphous Si (a:Si) and silicon germanium (SiGe) are first formed into a trench structure. An etching process that is selective to a:Si as compared to SiGe is employed in defining the regions in which the collar isolation will be formed. The selective etching process employed in the present invention is a wet etch process that includes etching with HF, rinsing, etching with NH4OH, rinsing, and drying with a monohydric alcohol such as isopropanol. The sequence of NH4OH etching and rinsing may be repeated any number of times. The conditions used in the selective etching process of the present invention are capable of etching a:Si at a faster rate than SiGe.

摘要翻译： 提供了一种形成沟槽存储单元结构的套环隔离的方法，其中首先将非晶硅（a：Si）和硅锗（SiGe）形成沟槽结构。 与SiGe相比，对a：Si有选择性的蚀刻工艺用于限定将形成套环隔离的区域。 在本发明中采用的选择性蚀刻方法是湿式蚀刻工艺，其包括用HF蚀刻，漂洗，用NH 4 OH蚀刻，漂洗和用一元醇如异丙醇干燥。 NH 4 OH蚀刻和漂洗的顺序可以重复任意次数。 在本发明的选择性蚀刻工艺中使用的条件能够以比SiGe更快的速度蚀刻Si。