公开(公告)号：US08572523B2

公开(公告)日：2013-10-29

申请号：US11781043

申请日：2007-07-20

申请人： Emre Tuncer ,  Hui Zheng ,  Vivek Raghavan ,  Anirudh Devgan ,  Amir Ajami ,  Alessandra Nardi ,  Tao Lin ,  Pramod Thazhathethil ,  Alfred Wong

发明人： Emre Tuncer ,  Hui Zheng ,  Vivek Raghavan ,  Anirudh Devgan ,  Amir Ajami ,  Alessandra Nardi ,  Tao Lin ,  Pramod Thazhathethil ,  Alfred Wong

IPC分类号： G06F17/50

CPC分类号： G06F17/5081 ,  G06F17/5036 ,  G06F17/5068 ,  G06F2217/12

摘要： A method for performing leakage analysis includes receiving information specifying an integrated circuit. A neighborhood of shapes associated with the integrated circuit is then determined. Leakage information associated with the integrated circuit is generated based on the neighborhood of shapes. The neighborhood of shapes may be determined by determining a first set of spacings to a boundary of a first cell from an internal shape. A second set of spacings may be determined from the boundary of the first cell to a shape of a second cell. A lithography process may be characterized using the first and second set of spacings.

摘要翻译： 执行泄漏分析的方法包括接收指定集成电路的信息。 然后确定与集成电路相关联的形状的邻域。 基于形状附近生成与集成电路相关联的泄漏信息。 可以通过从内部形状确定第一单元的边界的第一组间距来确定形状的邻域。 可以从第一单元的边界到第二单元的形状来确定第二组间隔。 可以使用第一和第二组间隔来表征光刻工艺。

公开(公告)号：US20080052646A1

公开(公告)日：2008-02-28

申请号：US11781043

申请日：2007-07-20

申请人： Emre Tuncer ,  Hui Zheng ,  Vivek Raghavan ,  Anirudh Devgan ,  Amir Ajami ,  Alessandra Nardi ,  Tao Lin ,  Pramod Thazhathethil ,  Alfred Wong

发明人： Emre Tuncer ,  Hui Zheng ,  Vivek Raghavan ,  Anirudh Devgan ,  Amir Ajami ,  Alessandra Nardi ,  Tao Lin ,  Pramod Thazhathethil ,  Alfred Wong

IPC分类号： G06F17/50

CPC分类号： G06F17/5081 ,  G06F17/5036 ,  G06F17/5068 ,  G06F2217/12

摘要： A method for performing leakage analysis includes receiving information specifying an integrated circuit. A neighborhood of shapes associated with the integrated circuit is then determined. Leakage information associated with the integrated circuit is generated based on the neighborhood of shapes. The neighborhood of shapes may be determined by determining a first set of spacings to a boundary of a first cell from an internal shape. A second set of spacings may be determined from the boundary of the first cell to a shape of a second cell. A lithography process may be characterized using the first and second set of spacings.

摘要翻译： 执行泄漏分析的方法包括接收指定集成电路的信息。 然后确定与集成电路相关联的形状的邻域。 基于形状附近生成与集成电路相关联的泄漏信息。 可以通过从内部形状确定第一单元的边界的第一组间距来确定形状的邻域。 可以从第一单元的边界到第二单元的形状来确定第二组间隔。 可以使用第一和第二组间隔来表征光刻工艺。

公开(公告)号：US08473876B2

公开(公告)日：2013-06-25

申请号：US11781054

申请日：2007-07-20

申请人： Emre Tuncer ,  Hui Zheng ,  Vivek Raghavan ,  Anirudh Devgan ,  Amir Ajami ,  Alessandra Nardi ,  Tao Lin ,  Pramod Thazhathethil ,  Alfred Wong

发明人： Emre Tuncer ,  Hui Zheng ,  Vivek Raghavan ,  Anirudh Devgan ,  Amir Ajami ,  Alessandra Nardi ,  Tao Lin ,  Pramod Thazhathethil ,  Alfred Wong

IPC分类号： G06F17/50

CPC分类号： G06F17/5031

摘要： A method for performing timing analysis includes receiving information specifying an integrated circuit. A neighborhood of shapes associated with the integrated circuit is then determined. Delay information associated with the integrated circuit is generated based on the neighborhood of shapes. The neighborhood of shapes may be determined by determining a first set of spacings to a boundary of a first cell from an internal shape. A second set of spacings may be determined from the boundary of the first cell to a shape of a second cell. A lithography process may be characterized using the first and second set of spacings.

摘要翻译： 一种执行定时分析的方法包括接收指定集成电路的信息。 然后确定与集成电路相关联的形状的邻域。 基于形状附近生成与集成电路相关联的延迟信息。 可以通过从内部形状确定第一单元的边界的第一组间距来确定形状的邻域。 可以从第一单元的边界到第二单元的形状来确定第二组间隔。 可以使用第一和第二组间隔来表征光刻工艺。

公开(公告)号：US20080052653A1

公开(公告)日：2008-02-28

申请号：US11781054

申请日：2007-07-20

申请人： Emre Tuncer ,  Hui Zheng ,  Vivek Raghavan ,  Anirudh Devgan ,  Amir Ajami ,  Alessandra Nardi ,  Tao Lin ,  Pramod Thazhathethil ,  Alfred Wong

发明人： Emre Tuncer ,  Hui Zheng ,  Vivek Raghavan ,  Anirudh Devgan ,  Amir Ajami ,  Alessandra Nardi ,  Tao Lin ,  Pramod Thazhathethil ,  Alfred Wong

IPC分类号： G06F17/50

CPC分类号： G06F17/5031

摘要： A method for performing timing analysis includes receiving information specifying an integrated circuit. A neighborhood of shapes associated with the integrated circuit is then determined. Delay information associated with the integrated circuit is generated based on the neighborhood of shapes. The neighborhood of shapes may be determined by determining a first set of spacings to a boundary of a first cell from an internal shape. A second set of spacings may be determined from the boundary of the first cell to a shape of a second cell. A lithography process may be characterized using the first and second set of spacings.

摘要翻译： 一种执行定时分析的方法包括接收指定集成电路的信息。 然后确定与集成电路相关联的形状的邻域。 基于形状附近生成与集成电路相关联的延迟信息。 可以通过从内部形状确定第一单元的边界的第一组间距来确定形状的邻域。 可以从第一单元的边界到第二单元的形状来确定第二组间隔。 可以使用第一和第二组间隔来表征光刻工艺。