Enhancement-depletion logic based on gaas mosfets
    1.
    发明授权
    Enhancement-depletion logic based on gaas mosfets 失效
    基于gaas mosfets的增强耗尽逻辑

    公开(公告)号:US5872031A

    公开(公告)日:1999-02-16

    申请号:US757875

    申请日:1996-11-27

    Abstract: The present invention discloses a method of forming an oxide layer on a layer of gallium arsenide, including the steps of depositing a layer of aluminum arsenide on the layer of gallium arsenide, of exposing the layer of aluminum arsenide to an oxidizing gas mixture so that the aluminum arsenide is oxidized to aluminum oxide, and of controlling excess arsenic released in the aluminum oxide during the exposing step, so as to ensure enhanced electrical properties in the aluminum oxide. The method is used to provide an insulating gate layer for a GaAs field effect transistor by forming an oxide layer on GaAs and controlling excess arsenic so as to maintain high resistivity in the oxide layer and to avoid the formation of interface surface states which degrade transistor performance. The method is also used to provide complementary metal-insulator-semiconductor logic devices based on the gallium arsenide field effect transistor.

    Abstract translation: 本发明公开了一种在砷化镓层上形成氧化物层的方法,包括以下步骤:在砷化镓层上沉积砷化铝层,将砷化铝层暴露于氧化气体混合物,使得 砷化铝被氧化成氧化铝,并且在曝光步骤期间控制在氧化铝中释放的过量的砷,以确保氧化铝中的电性能增强。 该方法用于通过在GaAs上形成氧化物层并且控制多余的砷以在氧化物层中保持高电阻率并避免形成降低晶体管性能的界面表面状态来为GaAs场效应晶体管提供绝缘栅层 。 该方法还用于提供基于砷化镓场效应晶体管的互补金属 - 绝缘体 - 半导体逻辑器件。

Patent Agency Ranking