Process for forming deep level impurity undoped phosphorous containing
semi-insulating epitaxial layers
    1.
    发明授权
    Process for forming deep level impurity undoped phosphorous containing semi-insulating epitaxial layers 失效
    用于形成深层杂质未掺杂磷的半绝缘外延层的工艺

    公开(公告)号:US6019840A

    公开(公告)日:2000-02-01

    申请号:US884353

    申请日:1997-06-27

    IPC分类号: C30B25/02 C30B25/16

    CPC分类号: C30B25/02 C30B29/40

    摘要: A reduced temperature low pressure metal organic chemical vapor deposition process for the production of semi-insulating deep level impurity undoped Group III-V phosphorous containing epitaxial layers. The present invention achieves production of semi-insulating layers at reduced growth temperatures in the approximate range of 490.degree. C. to 530.degree. C. Semi-insulating resistivities on the order of 10.sup.6 ohm-cm to 10.sup.9 ohm-cm are obtained according to the present process without resort to use of extrinsic dopants such as the transition metals typically used in conventional processes to obtain semi-insulating phosphorous containing layers, and without post processing annealing.

    摘要翻译: 一种降低温度的低压金属有机化学气相沉积工艺,用于生产半绝缘深层杂质未掺杂的III-V族含磷外延层。 本发明实现了在490℃至530℃的近似范围内的生长温度降低的半绝缘层的生产。根据本发明,获得了约10 6欧姆 - 109欧姆 - 厘米的半绝缘电阻率 本发明方法不需要使用外在掺杂剂,例如常规方法中通常使用的过渡金属来获得半绝缘含磷层,并且不需要后处理退火。

    Halide dopant process for producing semi-insulating group III-V regions
for semiconductor devices
    2.
    发明授权
    Halide dopant process for producing semi-insulating group III-V regions for semiconductor devices 失效
    用于半导体器件制造半绝缘组III-V区的卤化物掺杂剂工艺

    公开(公告)号:US5656538A

    公开(公告)日:1997-08-12

    申请号:US410782

    申请日:1995-03-24

    IPC分类号: H01L21/205 H01L21/20

    摘要: A process for growing semi-insulating layers of indium phosphide and other group III-V materials through the use of halide dopant or etchant introduction during growth. Gas phase epitaxial growth techniques are utilized at low temperatures to produce indium phosphide layers having a resistivity greater than approximately 10.sup.7 ohm-cm. According to the preferred embodiment carbon tetrachloride is used as a dopant at flow rates above 5 sccm to grow the layers with substrate growth temperatures ranging from approximately 460.degree. C. to 525.degree. C. This temperature range provides an advantage over the transition metal techniques for doping indium phosphide since the high temperatures generally required for those techniques limit the ability to control growth. Good surface morphology is also obtained through the growth according to the present invention. The process may be used to form many types of group III-V semiconductor devices.

    摘要翻译: 在生长期间通过使用卤素掺杂剂或蚀刻剂引入生长磷化铟和其它III-V族材料的半绝缘层的方法。 在低温下使用气相外延生长技术产生电阻率大于约107欧姆 - 厘米的磷化铟层。 根据优选的实施方案,四氯化碳以5sccm以上的流速用作掺杂剂,以生长基底生长温度为约460℃至525℃的层。该温度范围优于过渡金属技术 掺杂磷化铟,因为这些技术通常需要的高温限制了控制生长的能力。 通过根据本发明的生长也可获得良好的表面形态。 该方法可用于形成许多类型的III-V族III族半导体器件。