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    Mechanism for granting controlled access to a shared resource
    1.
    发明申请
    Mechanism for granting controlled access to a shared resource 有权
    授予受控访问共享资源的机制

    公开(公告)号：US20080266302A1

    公开(公告)日：2008-10-30

    申请号：US11797039

    申请日：2007-04-30

    申请人： Rodney C. Andre ,  Rex E. McCrary

    发明人： Rodney C. Andre ,  Rex E. McCrary

    IPC分类号： G06F13/14

    CPC分类号： G06F13/4234

    摘要： Disclosed are methods and systems for granting an application-specific integrated circuit (ASIC) in a multi-ASIC environment controlled access to a shared resource. A system includes a first ASIC, a second ASIC, and a shared memory that stores a shared resource and a data set partitioned into fields. The first ASIC writes data to a first subset of the fields and reads data from the fields. The first ASIC includes first logic that computes a first value based on the data read from the fields. The second ASIC writes data to a second subset of the fields and reads data from the fields. The second ASIC includes second logic that computes a second value based on the data read from the fields. Based on the first and second values respectively computed by the first and second logic, only one of the first and second ASICs gains access to the shared resource.

    摘要翻译： 公开了用于在多ASIC环境中授予专用集成电路（ASIC）以控制对共享资源的访问的方法和系统。 系统包括第一ASIC，第二ASIC和存储共享资源的共享存储器和分割成字段的数据集。 第一个ASIC将数据写入字段的第一个子集，并从字段读取数据。 第一ASIC包括基于从字段读取的数据计算第一值的第一逻辑。 第二个ASIC将数据写入字段的第二个子集，并从字段读取数据。 第二ASIC包括基于从字段读取的数据计算第二值的第二逻辑。 基于由第一和第二逻辑分别计算的第一和第二值，第一和第二ASIC中只有一个获得对共享资源的访问。

    Mechanism for Granting Controlled Access to a Shared Resource
    2.
    发明申请
    Mechanism for Granting Controlled Access to a Shared Resource 有权
    授予受控访问共享资源的机制

    公开(公告)号：US20110285731A1

    公开(公告)日：2011-11-24

    申请号：US13088285

    申请日：2011-04-15

    申请人： Rodney C. ANDRE ,  Rex E. McCrary

    发明人： Rodney C. ANDRE ,  Rex E. McCrary

    IPC分类号： G06F15/167

    CPC分类号： G06F13/4234

    摘要： Disclosed are methods and systems for granting an application-specific integrated circuit (ASIC) in a multi-ASIC environment controlled access to a shared resource. A system includes a first ASIC, a second ASIC, and a shared memory that stores a shared resource and a data set partitioned into fields. The first ASIC writes data to a first subset of the fields and reads data from the fields. The first ASIC includes first logic that computes a first value based on the data read from the fields. The second ASIC writes data to a second subset of the fields and reads data from the fields. The second ASIC includes second logic that computes a second value based on the data read from the fields. Based on the first and second values respectively computed by the first and second logic, only one of the first and second ASICs gains access to the shared resource.

    摘要翻译： 公开了用于在多ASIC环境中授予专用集成电路（ASIC）以控制对共享资源的访问的方法和系统。 系统包括第一ASIC，第二ASIC和存储共享资源的共享存储器和分割成字段的数据集。 第一个ASIC将数据写入字段的第一个子集，并从字段读取数据。 第一ASIC包括基于从字段读取的数据计算第一值的第一逻辑。 第二个ASIC将数据写入字段的第二个子集，并从字段读取数据。 第二ASIC包括基于从字段读取的数据计算第二值的第二逻辑。 基于由第一和第二逻辑分别计算的第一和第二值，第一和第二ASIC中只有一个获得对共享资源的访问。

    Providing alternate bus master with multiple cycles of bursting access to local bus in a dual bus system including a processor local bus and a device communications bus
    3.
    发明授权
    Providing alternate bus master with multiple cycles of bursting access to local bus in a dual bus system including a processor local bus and a device communications bus 失效
    在包括处理器本地总线和设备通信总线在内的双总线系统中，提供备用总线主机多次突发访问本地总线

    公开(公告)号：US5469577A

    公开(公告)日：1995-11-21

    申请号：US250328

    申请日：1994-05-27

    申请人： Robert C. Eng ,  John W. Galella ,  Rex E. McCrary ,  Mark G. McDonald ,  Eric H. Stelzer ,  Frederick C. Yentz

    发明人： Robert C. Eng ,  John W. Galella ,  Rex E. McCrary ,  Mark G. McDonald ,  Eric H. Stelzer ,  Frederick C. Yentz

    IPC分类号： G06F13/00 ,  G06F13/28 ,  G06F13/36 ,  G06F13/362

    CPC分类号： G06F13/285 ,  G06F13/362

    摘要： Disclosed method and apparatus allow for balanced usage of resources in dual bus computing systems wherein: (1) principal resources of the system--including a processor, a local bus, local bus controls, and a memory subsystem--are contained in a single system unit (e.g. a card); (2) devices are coupled to the system unit and to each other through a device communications bus that is also accessible to the processor of the system unit; (3) the system processor is required to have principal access to the local bus, as a "System Bus Master", for time critical functions such as memory refresh; and (4) the devices include one or more devices that are required to have controlling access to the resources of the system unit, and for that purpose are required to have controlling access to the local bus as Alternate Bus Master entities. The disclosed arrangement allows an Alternate Bus Master operating in a burst mode, in which several cycles of data transfer may occur consecutively, to have continuous access to the local bus after a single signal handshaking exchange with the local bus controls; subject to over-riding conditions which ensure timely accomplishment of the time critical functions controlled by the processor/System Bus Master. The over-riding conditions are detected by special logic that acts, when necessary, to interrupt Alternate Bus Master access to the local bus without affecting the state of connection between the respective Alternate Bus Master and the communications bus.

    摘要翻译： 公开的方法和装置允许双总线计算系统中的资源的平衡使用，其中：（1）系统的主要资源（包括处理器，局部总线，局部总线控制和存储器子系统）被包含在单个系统单元 （例如卡）; （2）设备通过也可由系统单元的处理器访问的设备通信总线耦合到系统单元并彼此耦合; （3）系统处理器需要主要访问本地总线作为“系统总线主站”，用于时间关键功能，如内存刷新; 和（4）设备包括一个或多个需要对系统单元的资源进行访问的设备，并且为此需要具有对作为备用总线主机实体的本地总线的控制访问。 所公开的布置允许以突发模式操作的备用总线主机，其中可以连续发生多个数据传输周期，以在与本地总线控制器的单个信号握手交换之后具有对本地总线的连续访问; 受到过载条件的影响，确保及时完成处理器/系统总线主控控制的时间关键功能。 过载条件由特殊逻辑检测，当需要时，可以中断替代总线主站访问本地总线，而不影响相应的备用总线主站和通信总线之间的连接状态。

    Method and apparatus for single instruction multiple data caching
    4.
    发明授权
    Method and apparatus for single instruction multiple data caching 有权
    单指令多数据缓存的方法和装置

    公开(公告)号：US07594069B2

    公开(公告)日：2009-09-22

    申请号：US10788225

    申请日：2004-02-26

    申请人： Jeffrey T. Brady ,  Brian A. Buchner ,  Rex E. McCrary ,  Ralph C. Taylor

    发明人： Jeffrey T. Brady ,  Brian A. Buchner ,  Rex E. McCrary ,  Ralph C. Taylor

    IPC分类号： G06F12/00

    CPC分类号： G06F12/0846 ,  G06F12/0844 ,  G06F12/0875

    摘要： An apparatus and method for single instruction multiple data caching includes a memory access request generator operative to receive a primary access request. The method and apparatus further includes a cache controller coupled to the memory access request generator, wherein the cache controller is operative to execute a memory request. The method and apparatus further includes a memory interface coupled to the cache controller, the memory interface operative to retrieve a plurality of requested data. The method and apparatus further includes a request processor coupled to the cache controller, the memory interface and the memory access request generator. The request processor is operative to receive a plurality of requested data and thereupon generate a plurality of parallel data outputs therefrom.

    摘要翻译： 用于单指令多数据缓存的装置和方法包括可操作以接收主要访问请求的存储器访问请求发生器。 所述方法和装置还包括耦合到存储器访问请求生成器的高速缓存控制器，其中高速缓存控制器可操作以执行存储器请求。 所述方法和装置还包括耦合到所述高速缓存控制器的存储器接口，所述存储器接口可操作以检索多个所请求的数据。 该方法和装置还包括耦合到高速缓存控制器，存储器接口和存储器访问请求生成器的请求处理器。 请求处理器可操作以接收多个所请求的数据，并随后从其生成多个并行数据输出。

    Mechanism for granting controlled access to a shared resource
    6.
    发明授权
    Mechanism for granting controlled access to a shared resource 有权
    授予受控访问共享资源的机制

    公开(公告)号：US08576236B2

    公开(公告)日：2013-11-05

    申请号：US13088285

    申请日：2011-04-15

    申请人： Rodney C. Andre ,  Rex E. McCrary

    发明人： Rodney C. Andre ,  Rex E. McCrary

    IPC分类号： G06F15/167 ,  G06F15/16 ,  G06F15/80 ,  G06F13/14 ,  G06F13/18

    CPC分类号： G06F13/4234

    摘要： Disclosed are methods and systems for granting an application-specific integrated circuit (ASIC) in a multi-ASIC environment controlled access to a shared resource. A system includes a first ASIC, a second ASIC, and a shared memory that stores a shared resource and a data set partitioned into fields. The first ASIC writes data to a first subset of the fields and reads data from the fields. The first ASIC includes first logic that computes a first value based on the data read from the fields. The second ASIC writes data to a second subset of the fields and reads data from the fields. The second ASIC includes second logic that computes a second value based on the data read from the fields. Based on the first and second values respectively computed by the first and second logic, only one of the first and second ASICs gains access to the shared resource.

    摘要翻译： 公开了用于在多ASIC环境中授予专用集成电路（ASIC）以控制对共享资源的访问的方法和系统。 系统包括第一ASIC，第二ASIC和存储共享资源的共享存储器和分割成字段的数据集。 第一个ASIC将数据写入字段的第一个子集，并从字段读取数据。 第一ASIC包括基于从字段读取的数据计算第一值的第一逻辑。 第二个ASIC将数据写入字段的第二个子集，并从字段读取数据。 第二ASIC包括基于从字段读取的数据计算第二值的第二逻辑。 基于由第一和第二逻辑分别计算的第一和第二值，第一和第二ASIC中只有一个获得对共享资源的访问。

    Mechanism for granting controlled access to a shared resource
    7.
    发明授权
    Mechanism for granting controlled access to a shared resource 有权
    授予受控访问共享资源的机制

    公开(公告)号：US08068114B2

    公开(公告)日：2011-11-29

    申请号：US11797039

    申请日：2007-04-30

    申请人： Rodney C. Andre ,  Rex E. McCrary

    发明人： Rodney C. Andre ,  Rex E. McCrary

    IPC分类号： G06F15/167 ,  G06F15/16 ,  G06F15/80 ,  G06F13/14 ,  G06F13/18 ,  G06F12/00 ,  G05B19/18

    CPC分类号： G06F13/4234

    摘要： Disclosed are methods and systems for granting an application-specific integrated circuit (ASIC) in a multi-ASIC environment controlled access to a shared resource. A system includes a first ASIC, a second ASIC, and a shared memory that stores a shared resource and a data set partitioned into fields. The first ASIC writes data to a first subset of the fields and reads data from the fields. The first ASIC includes first logic that computes a first value based on the data read from the fields. The second ASIC writes data to a second subset of the fields and reads data from the fields. The second ASIC includes second logic that computes a second value based on the data read from the fields. Based on the first and second values respectively computed by the first and second logic, only one of the first and second ASICs gains access to the shared resource.

    摘要翻译： 公开了用于在多ASIC环境中授予专用集成电路（ASIC）以控制对共享资源的访问的方法和系统。 系统包括第一ASIC，第二ASIC和存储共享资源的共享存储器和分割成字段的数据集。 第一个ASIC将数据写入字段的第一个子集，并从字段读取数据。 第一ASIC包括基于从字段读取的数据计算第一值的第一逻辑。 第二个ASIC将数据写入字段的第二个子集，并从字段读取数据。 第二ASIC包括基于从字段读取的数据计算第二值的第二逻辑。 基于由第一和第二逻辑分别计算的第一和第二值，第一和第二ASIC中只有一个获得对共享资源的访问。