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公开(公告)号：US4208595A
公开(公告)日：1980-06-17
申请号：US954946
申请日：1978-10-24
IPC分类号： H01L27/04 , G05F3/20 , G11C11/407 , H01L21/822 , H01L29/78 , H02M3/07 , H03K1/02
CPC分类号： H02M3/07 , G05F3/205 , B65G2209/04
摘要： An FET substrate voltage generator circuit is disclosed for converting a single power supply and ground potential to a negative potential having an absolute value whose magnitude is greater than the power supply potential and applying that potential to the substrate of an integrated circuit upon which it is formed. The circuit dissipates less power per unit of current supplied by the circuit and occupies less space than do prior art circuits. The circuit applies the principle of voltage doubling to a first capacitor to achieve the desired voltage magnitude across a second capacitor and then applies the principle of a.c. coupling to that second capacitor connected through an impedance to the first capacitor, to achieve the desired polarity inversion for the substrate voltage to be generated. This circuit provides the current generating capacity necessary to drive the substrate to a negative voltage and sink the required current so as to maintain the substrate at an adequate negative bias.
摘要翻译： 公开了用于将单个电源和地电位转换为具有大于电源电位的绝对值的负电位的FET衬底电压发生器电路，并将该电位施加到其形成的集成电路的衬底 。 该电路消耗了电路提供的每单位电流的功率更少，并且占用比现有技术电路少的空间。 该电路将电压倍增原理应用于第一电容器，以实现跨第二电容器所需的电压幅值，然后应用直流电源的原理。 耦合到通过阻抗连接到第一电容器的第二电容器，以获得要产生的衬底电压的期望的极性反转。 该电路提供将衬底驱动到负电压所需的电流产生能力并且吸收所需电流，以便将衬底保持在足够的负偏压。
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2.发明授权Display window layout system that automatically accommodates changes in display resolution, font size and national language 失效显示窗口布局系统，可自动适应显示分辨率，字体大小和国家语言的变化
公开(公告)号：US5513342A
公开(公告)日：1996-04-30
申请号：US174898
申请日：1993-12-28
申请人： Kevin K. Leong , Robert D. Love , Hiroshi Tsuji
发明人： Kevin K. Leong , Robert D. Love , Hiroshi Tsuji
CPC分类号： G06F9/4443
摘要： A graphical user interface display window configurations containing user-readable data and is implemented by a software presentation system. The software presentation system automatically adjusts window size and positioning in accordance with window environment changes (e.g. changes in user readable data and/or window resolution). The method includes the steps of: establishing through operation of the presentation system, a display including windows with user-readable data; detecting a change in window environment; responding automatically to the change in window environment to determine windows in the display that require a size adjustment; recalculating the size of each window that requires adjustment; and operating a layout routine to reposition windows in the display in accordance with predetermined spacing and positioning parameters.
摘要翻译： 图形用户界面显示包含用户可读数据的窗口配置，并由软件演示系统实现。 软件呈现系统根据窗口环境变化（例如用户可读数据和/或窗口分辨率的改变）自动调整窗口大小和定位。 该方法包括以下步骤：通过演示系统的操作来建立包括具有用户可读数据的窗口的显示器; 检测窗口环境的变化; 自动响应窗口环境的变化，以确定需要调整大小的显示器中的窗口; 重新计算需要调整的每个窗口的大小; 以及操作布局例程以根据预定的间隔和定位参数重新定位显示器中的窗口。
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3.发明授权
公开(公告)号：US4034243A
公开(公告)日：1977-07-05
申请号：US642513
申请日：1975-12-19
IPC分类号： H01L21/822 , H01L21/82 , H01L27/04 , H01L27/088 , H01L27/118 , H01L29/78 , H03K3/356 , H03K19/0944 , H03K3/353 , H01L23/48 , H03K19/34
CPC分类号： H01L27/11803 , H01L27/0883 , H03K19/09443 , H03K3/356017 , H01L2924/0002
摘要： A depletion mode load device structure is disclosed which improved upon the existing Weinberger layout technique, as applied to enhancement mode/depletion mode circuitry. The structure of an FET, self biased load device includes a single metallized vertical line performing three functions: a source contact for the FET device, the gate electrode for the FET device, and the output line for the circuit for which the device serves as the load. Use of this structure results in an increased horizontal circuit packing density, which is particularly useful in the decoder circuits for a programmed logic array.
摘要翻译： 公开了一种耗尽型负载装置结构，其改进了现有的Weinberger布局技术，适用于增强模式/耗尽模式电路。 FET，自偏压负载装置的结构包括执行三种功能的单个金属化垂直线：用于FET器件的源极接触，用于FET器件的栅电极，以及用于器件用作FET器件的电路的输出线 加载。 使用这种结构导致增加的水平电路封装密度，这在编程逻辑阵列的解码器电路中特别有用。
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