公开(公告)号：US4860066A

公开(公告)日：1989-08-22

申请号：US1472

申请日：1987-01-08

申请人： Peter D. Kirchner ,  Ronald F. Marks ,  George D. Pettit ,  Jerry M. Woodall ,  Steven L. Wright

发明人： Peter D. Kirchner ,  Ronald F. Marks ,  George D. Pettit ,  Jerry M. Woodall ,  Steven L. Wright

IPC分类号： H01L31/0248 ,  H01L31/02 ,  H01L31/0216 ,  H01L31/08 ,  H01L31/10 ,  H01L33/44 ,  H01S5/00

CPC分类号： H01L33/44 ,  H01L31/02161

摘要： An environmental interface for a semiconductor electro-optical conversion device layer that is optically transparent, electrically conductive and chemically passivating, made of an elemental semiconductor with an indirect band gap>1 electron volt in a layer between 20 and 200 Angstroms thick. A GaAs covered by GaAlAs converter with a 100 Angstrom Si layer over the GaAlAs is illustrated.

公开(公告)号：US4821082A

公开(公告)日：1989-04-11

申请号：US115778

申请日：1987-10-30

申请人： David J. Frank ,  Ronald F. Marks

发明人： David J. Frank ,  Ronald F. Marks

IPC分类号： H01L29/205 ,  H01L21/331 ,  H01L29/73 ,  H01L29/737 ,  H01L29/72

CPC分类号： H01L29/7371

摘要： Heterojunction bipolar transistors are disclosed having an energy band offset in the valence or conduction band and the other of the bands being substantially aligned at the heterojunction. For an npn transistor the conduction band is substantially aligned and the bandgap difference is in the valence band. A pnp type transistor is also disclosed wherein all the bandgap difference is in the conduction band and the valence band is substantially aligned. The npn type transistor provides improved hole confinement in the base as well as enhanced electron injection and collection. In one embodiment of a double heterojunction bipolar transistor, materials are selected that utilize Ga compounds in the base and Al and/or In compounds in the emitter and collector, which have a valence band offset of approximately 400 meV or greater and an aligned conduction band at both of the heterojunctions.

公开(公告)号：US4685606A

公开(公告)日：1987-08-11

申请号：US861696

申请日：1986-05-09

申请人： Ephraim B. Flint ,  Peter A. Gruber ,  Ronald F. Marks ,  Graham Olive ,  Arthur R. Zingher

发明人： Ephraim B. Flint ,  Peter A. Gruber ,  Ronald F. Marks ,  Graham Olive ,  Arthur R. Zingher

IPC分类号： H01L23/36 ,  H01L23/373 ,  H01L23/433 ,  H01L23/473 ,  B23K31/02

CPC分类号： H01L23/3736 ,  H01L23/433 ,  H01L23/473 ,  H01L2224/16 ,  H01L2924/01014

摘要： A method of joining a thermally conductive element to an electric circuit chip for cooling the chip includes initial steps of forming an oxide-free preform of a fusible metal alloy by extrusion of alloy between two mold blocks or plates. During the extrusion, the oxide coating is left behind so that the extruded alloy is essentially free of oxide. The extrusion takes place at a temperature elevated to approximately the liquidus temperature of the alloy. The preform, which may be in the form of a pill or section of thin foil, is placed between interfacing surfaces of the thermally conductive element and the chip, and is then extruded along the interfacing surfaces under pressure and elevated temperature to form a thermally conductive, oxide-free bonding layer of superior thermal conductivity.

摘要翻译： 将导热元件接合到用于冷却芯片的电路芯片的方法包括通过在两个模块或板之间挤出合金来形成易熔金属合金的无氧化物预制件的初始步骤。 在挤出过程中，留下氧化物涂层，使得挤出的合金基本上不含氧化物。 挤压在升至约合金的液相线温度的温度下进行。 预成型件（其可以是薄片形式的片或薄片形式）放置在导热元件和芯片的接合表面之间，然后在压力和升高的温度下沿着界面表面挤出以形成导热 ，无氧化物结合层，导热性优良。