PIXEL DRIVING CIRCUIT, DRIVING METHOD, AND DISPLAY PANEL

    公开(公告)号:US20240363055A1

    公开(公告)日:2024-10-31

    申请号:US18458756

    申请日:2023-08-30

    发明人: Mengmeng ZHANG

    IPC分类号: G09G3/32

    摘要: Disclosed are a pixel driving circuit, a driving method and a display panel. The pixel driving circuit includes a pulse amplitude modulation driving circuit, a pulse width modulation driving circuit and an anti-leakage circuit. The pulse amplitude modulation driving circuit is configured to control an amplitude of a driving current provided to a light-emitting device to be driven. The pulse width modulation driving circuit is configured to control a pulse width of the driving current provided to a light-emitting device to be driven. The anti-leakage circuit is electrically connected between the pulse amplitude modulation driving circuit and the pulse width modulation driving circuit. The anti-leakage circuit is used for cutting off a current leakage path between the pulse amplitude modulation driving circuit and the pulse width modulation driving circuit.

    Display panel and method for manufacturing same

    公开(公告)号:US12133433B2

    公开(公告)日:2024-10-29

    申请号:US17310923

    申请日:2021-08-09

    发明人: Jia Tang

    IPC分类号: H10K59/179 G09G3/3216

    CPC分类号: H10K59/179 G09G3/3216

    摘要: A display panel and a method for manufacturing the display panel are provided. The method comprises forming an array driving layer, a binding terminal, a passivation layer, a covering layer and an electrode layer on a substrate, and applying a half-tone mask to perform a patterning process on the covering layer and the electrode layer, so that the covering layer forms a first covering portion connected to the binding terminal through a first through hole and a second covering portion corresponding to the array driving layer formed on the display area. The electrode layer forms a second electrode portion on the second covering portion.

    Array substrate and display panel

    公开(公告)号:US12132055B2

    公开(公告)日:2024-10-29

    申请号:US17762115

    申请日:2022-03-17

    摘要: The present application discloses an array substrate and a display panel. The array substrate includes a plurality of pixel units arranged in an array, each of the pixel units includes a thin film transistor. The thin film transistor includes a gate electrode and a drain electrode. A first overlap region and a non-overlap region is defined between the gate electrode and the drain electrode. The first overlap region is adjacent to the non-overlap region. A width of a cross section of the drain electrode in the first overlap region is less than a width of a cross section of the drain electrode in the non-overlap region. The array substrate can reduce a parasitic capacitor between the gate electrode and drain electrode.

    Display panel and display module
    6.
    发明授权

    公开(公告)号:US12124135B2

    公开(公告)日:2024-10-22

    申请号:US17297488

    申请日:2021-05-21

    发明人: Zhengyu Feng

    IPC分类号: G02F1/1343

    CPC分类号: G02F1/134309

    摘要: A display panel and a display module are disclosed. The display panel includes first pixel electrodes and second pixel electrodes arranged in an array and alternately arranged, each of the first pixel electrodes and the second pixel electrodes includes a trunk portion and a plurality of branch portions connected to the trunk portion, the trunk portion divides each of the first pixel electrodes or the second pixel electrodes into at most two domains, and an extension direction of the branch portions in one of the domains of any one of the first pixel electrodes is different from an extension direction of the branch portions in corresponding one of the domains of adjacent one of the second pixel electrodes, thereby relieving diffraction phenomenon.

    DISPLAY PANELS AND METHODS FOR MANUFACTURING THE SAME

    公开(公告)号:US20240315092A1

    公开(公告)日:2024-09-19

    申请号:US18542681

    申请日:2023-12-17

    发明人: Qianyi ZHANG

    摘要: The present disclosure provides a display panel and a method for manufacturing the same. The display panel includes a functional metal layer that includes a capacitor plate, a light-shielding pattern, and a metal wiring disposed at intervals; areas where the capacitor plate, the light-shielding pattern, and the metal wiring are located are defined as a capacitance area, a light-shielding area, and a metal wiring area, respectively; a part of a buffer layer disposed in the capacitance area is provided with a first thinning structure; a first semiconductor is disposed on the first thinning structure and capable of forming a first capacitance with the capacitor plate.