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1.发明申请Method for Reading Out Multiple SRAM Blocks With Different Column Sizing In Stitched CMOS Image Senor 有权在拼接CMOS图像中读出不同列尺寸的多个SRAM块的方法公开(公告)号：US20130334401A1
公开(公告)日：2013-12-19
申请号：US13902009
申请日：2013-05-24
Applicant: Steven Huang , Christophe Ca Basset , Sam Bagwell , Jonathan Bergey , Loc Truong
Inventor： Steven Huang , Christophe Ca Basset , Sam Bagwell , Jonathan Bergey , Loc Truong
IPC: H01L27/146
CPC classification number: H01L27/14634 , H04N3/1593 , H04N5/335 , H04N5/3415
Abstract: A stitched image sensor array on a semiconductor substrate with identical blocks that have wherein said first configuration includes enable inputs, which vary a function of the block depending on the connection to the enable inputs. The enable inputs can set an SRAM to receive different numbers of inputs.
Abstract translation: 具有相同块的半导体衬底上的缝合图像传感器阵列，其中所述第一配置包括使能输入，其根据与使能输入的连接来改变块的功能。 使能输入可以设置SRAM以接收不同数量的输入。
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公开(公告)号：US09754989B2
公开(公告)日：2017-09-05
申请号：US13902009
申请日：2013-05-24
Applicant: Steven Huang , Christophe Ca Basset , Sam Bagwell , Jonathan Bergey , Loc Truong
Inventor： Steven Huang , Christophe Ca Basset , Sam Bagwell , Jonathan Bergey , Loc Truong
IPC: H01L27/146 , H04N5/335 , H04N3/14
CPC classification number: H01L27/14634 , H04N3/1593 , H04N5/335 , H04N5/3415
Abstract: A stitched image sensor array on a semiconductor substrate with identical blocks that have wherein said first configuration includes enable inputs, which vary a function of the block depending on the connection to the enable inputs. The enable inputs can set an SRAM to receive different numbers of inputs.
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公开(公告)号：US09007500B2
公开(公告)日：2015-04-14
申请号：US13950080
申请日：2013-07-24
Applicant: David Estrada , Sam Bagwell , Loc Truong
Inventor： David Estrada , Sam Bagwell , Loc Truong
CPC classification number: H04N5/3765 , H03K5/14 , H04N5/353
Abstract: An image sensor system using a circuit that automatically provides a multiple point output which represents, in a first mode, each of the multiple points receiving outputs at substantially the same time delayed only by a transit time across a wire connecting the multiple point outputs, and in a second mode, each of the multiple points producing outputs that are delayed by a delay time, where each output is delayed relative to each other output by said delay time in the second mode.
Abstract translation: 一种使用自动提供多点输出的电路的图像传感器系统，所述电路表示在第一模式中，所述多个点中的每个接收输出的基本上相同的时间仅延迟穿过连接所述多个点输出的导线， 在第二模式中，多个点中的每一个产生延迟延迟时间的输出，其中每个输出在第二模式中相对于彼此输出延迟所述延迟时间。
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公开(公告)号：US20140061435A1
公开(公告)日：2014-03-06
申请号：US13950080
申请日：2013-07-24
Applicant: David Estrada , Sam Bagwell , Loc Truong
Inventor： David Estrada , Sam Bagwell , Loc Truong
CPC classification number: H04N5/3765 , H03K5/14 , H04N5/353
Abstract: An image sensor system using a circuit that automatically provides a multiple point output which represents, in a first mode, each of the multiple points receiving outputs at substantially the same time delayed only by a transit time across a wire connecting the multiple point outputs, and in a second mode, each of the multiple points producing outputs that are delayed by a delay time, where each output is delayed relative to each other output by said delay time in the second mode.
Abstract translation: 一种使用自动提供多点输出的电路的图像传感器系统，所述电路表示在第一模式中，所述多个点中的每个接收输出的基本上相同的时间仅延迟穿过连接所述多个点输出的导线， 在第二模式中，多个点中的每一个产生延迟延迟时间的输出，其中每个输出在第二模式中相对于彼此输出延迟所述延迟时间。
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