-
1.发明申请Method for Reading Out Multiple SRAM Blocks With Different Column Sizing In Stitched CMOS Image Senor 有权在拼接CMOS图像中读出不同列尺寸的多个SRAM块的方法公开(公告)号：US20130334401A1
公开(公告)日：2013-12-19
申请号：US13902009
申请日：2013-05-24
Applicant: Steven Huang , Christophe Ca Basset , Sam Bagwell , Jonathan Bergey , Loc Truong
Inventor： Steven Huang , Christophe Ca Basset , Sam Bagwell , Jonathan Bergey , Loc Truong
IPC: H01L27/146
CPC classification number: H01L27/14634 , H04N3/1593 , H04N5/335 , H04N5/3415
Abstract: A stitched image sensor array on a semiconductor substrate with identical blocks that have wherein said first configuration includes enable inputs, which vary a function of the block depending on the connection to the enable inputs. The enable inputs can set an SRAM to receive different numbers of inputs.
Abstract translation: 具有相同块的半导体衬底上的缝合图像传感器阵列，其中所述第一配置包括使能输入，其根据与使能输入的连接来改变块的功能。 使能输入可以设置SRAM以接收不同数量的输入。
-
公开(公告)号：US09007500B2
公开(公告)日：2015-04-14
申请号：US13950080
申请日：2013-07-24
Applicant: David Estrada , Sam Bagwell , Loc Truong
Inventor： David Estrada , Sam Bagwell , Loc Truong
CPC classification number: H04N5/3765 , H03K5/14 , H04N5/353
Abstract: An image sensor system using a circuit that automatically provides a multiple point output which represents, in a first mode, each of the multiple points receiving outputs at substantially the same time delayed only by a transit time across a wire connecting the multiple point outputs, and in a second mode, each of the multiple points producing outputs that are delayed by a delay time, where each output is delayed relative to each other output by said delay time in the second mode.
Abstract translation: 一种使用自动提供多点输出的电路的图像传感器系统，所述电路表示在第一模式中，所述多个点中的每个接收输出的基本上相同的时间仅延迟穿过连接所述多个点输出的导线， 在第二模式中，多个点中的每一个产生延迟延迟时间的输出，其中每个输出在第二模式中相对于彼此输出延迟所述延迟时间。
-
公开(公告)号：US20140061435A1
公开(公告)日：2014-03-06
申请号：US13950080
申请日：2013-07-24
Applicant: David Estrada , Sam Bagwell , Loc Truong
Inventor： David Estrada , Sam Bagwell , Loc Truong
CPC classification number: H04N5/3765 , H03K5/14 , H04N5/353
Abstract: An image sensor system using a circuit that automatically provides a multiple point output which represents, in a first mode, each of the multiple points receiving outputs at substantially the same time delayed only by a transit time across a wire connecting the multiple point outputs, and in a second mode, each of the multiple points producing outputs that are delayed by a delay time, where each output is delayed relative to each other output by said delay time in the second mode.
Abstract translation: 一种使用自动提供多点输出的电路的图像传感器系统，所述电路表示在第一模式中，所述多个点中的每个接收输出的基本上相同的时间仅延迟穿过连接所述多个点输出的导线， 在第二模式中，多个点中的每一个产生延迟延迟时间的输出，其中每个输出在第二模式中相对于彼此输出延迟所述延迟时间。
-
公开(公告)号：US09754989B2
公开(公告)日：2017-09-05
申请号：US13902009
申请日：2013-05-24
Applicant: Steven Huang , Christophe Ca Basset , Sam Bagwell , Jonathan Bergey , Loc Truong
Inventor： Steven Huang , Christophe Ca Basset , Sam Bagwell , Jonathan Bergey , Loc Truong
IPC: H01L27/146 , H04N5/335 , H04N3/14
CPC classification number: H01L27/14634 , H04N3/1593 , H04N5/335 , H04N5/3415
Abstract: A stitched image sensor array on a semiconductor substrate with identical blocks that have wherein said first configuration includes enable inputs, which vary a function of the block depending on the connection to the enable inputs. The enable inputs can set an SRAM to receive different numbers of inputs.
-
公开(公告)号：US09752928B2
公开(公告)日：2017-09-05
申请号：US13949009
申请日：2013-07-23
Applicant: Guang Yang , Loc Truong
Inventor： Guang Yang , Loc Truong
IPC: H01L27/00 , G01J1/44 , H01L27/146
CPC classification number: G01J1/44 , H01L27/14607 , H01L27/1461 , H01L27/14612
Abstract: An image sensor pixel the conformist single pixel of a larger array. The image sensor pixel can be a large one, such as larger than 100 μm. The image sensor pixel has readout notes on multiple sides thereof, e.g. on to work for sides, that are symmetrically located on the pixel. The readout notes are simultaneously read out to read out a part of the image from the pixel.
-
Patent Agency Ranking
公开(公告)号：US08907827B2
公开(公告)日：2014-12-09
申请号：US13907874
申请日：2013-06-01
Applicant: Christophe Basset , Loc Truong , Kevin Stevulak
Inventor： Christophe Basset , Loc Truong , Kevin Stevulak
CPC classification number: H03M1/1009 , H03M1/1061 , H03M1/123
Abstract: Calibrating of A/D converters is carried out by obtaining adjustable reference voltages which are used in A/D conversion, comparing a first divided reference voltage of a full range voltage Vref, with a second divided reference voltage of Vref using analog to digital converters that are used in the A/D conversion; and adjusting at least one of said reference voltages to obtain a set ratio between said multiple ones of said reference voltages. The compared values can include a divided version of Vref, e.g., 3/8 Vref.
Abstract translation: 通过获得用于A / D转换的可调参考电压，将全范围电压Vref的第一划分参考电压与使用模数转换器的第二分频参考电压Vref进行比较来进行校准A / D转换器， 用于A / D转换; 以及调整所述参考电压中的至少一个以获得所述多个参考电压之间的设定比率。 比较值可以包括Vref的分割版本，例如3 / 8Vref。
-
公开(公告)号：US20140027609A1
公开(公告)日：2014-01-30
申请号：US13949009
申请日：2013-07-23
Applicant: Guang Yang , Loc Truong
Inventor： Guang Yang , Loc Truong
IPC: G01J1/44
CPC classification number: G01J1/44 , H01L27/14607 , H01L27/1461 , H01L27/14612
Abstract: An image sensor pixel the conformist single pixel of a larger array. The image sensor pixel can be a large one, such as larger than 100 μm. The image sensor pixel has readout notes on multiple sides thereof, e.g. on to work for sides, that are symmetrically located on the pixel. The readout notes are simultaneously read out to read out a part of the image from the pixel.
Abstract translation: 图像传感器像素为较大阵列的一致单个像素。 图像传感器像素可以是大的，例如大于100mum。 图像传感器像素在其多个侧面具有读出笔记，例如。 对于侧面，对称地位于像素上。 读出的笔记被同时读出，从像素中读出一部分图像。
-
公开(公告)号：US5258843A
公开(公告)日：1993-11-02
申请号：US801973
申请日：1991-12-03
Applicant: Loc Truong
Inventor： Loc Truong
CPC classification number: H04N5/272 , G09G5/397 , G09G2340/125 , G09G5/14
Abstract: A video system is disclosed which is capable of receiving digital data from a source such as a video camera, and subsequently transferring the received data into a main frame buffer for display on a video display, where the data from the source can overlay a primary image stored in the main frame buffer. An auxiliary frame buffer, consisting of a bank of dual-port RAMs, receives the data of the overlay image via its serial port and transfers this data into the randomly accessible array therein. A direct-memory-access (DMA) operation performs the transfer from the auxiliary frame buffer into the main frame buffer, with the source and destination positions in the auxiliary and main frame buffers, respectively, independently selectable. The performance of the DMA operation can be enhanced by simultaneously performing a page mode read of the auxiliary frame buffer with a page mode write to the main frame buffer.
Abstract translation: 公开了一种视频系统，其能够从诸如摄像机的源接收数字数据，并且随后将接收的数据传送到主帧缓冲器中以在视频显示器上显示，其中源的数据可以覆盖主图像 存储在主帧缓冲区中。 由一组双端口RAM组成的辅助帧缓冲器经由其串行端口接收覆盖图像的数据，并将该数据传送到其中随机访问的阵列中。 直接存储器访问（DMA）操作执行从辅助帧缓冲器到主帧缓冲器的传输，分别在辅助和主帧缓冲器中的源和目的位置可独立地选择。 可以通过同时执行对主帧缓冲器的页模式写入的辅助帧缓冲器的页模式读取来增强DMA操作的性能。
-
公开(公告)号：US09357149B2
公开(公告)日：2016-05-31
申请号：US13949183
申请日：2013-07-23
Applicant: Barmak Mansoorian , Daniel vanBlerkom , Loc Truong , David Estrada
Inventor： Barmak Mansoorian , Daniel vanBlerkom , Loc Truong , David Estrada
CPC classification number: H04N5/376 , H04N5/222 , H04N5/2251 , H04N5/247
Abstract: An image sensor system has a first stitched image sensor part that has multiple image sensing pixels and pixel gates. The multiple pixel gates are connected together by a first line on the first stitched image sensor part, and said multiple pixel gates are controlled by a first control signal. A second stitched image sensor part also has multiple sensing pixels and pixel gates, and the multiple pixel gates are connected together by a second line on said second stitched image sensor part, and said multiple pixel gates on said second stitched image sensor part are controlled by the first control signal. A driver for the first control signal, wherein said driver includes a first part for controlling said multiple pixel gates of said first stitched image sensor part and said driver has a second part, also driven by the same first control signal, for controlling said multiple pixel gates of said second stitched image sensor part.
Abstract translation: 图像传感器系统具有第一缝合图像传感器部分，其具有多个图像感测像素和像素门。 多个像素栅极通过第一缝合图像传感器部分上的第一条线连接在一起，并且所述多个像素栅极由第一控制信号控制。 第二缝合图像传感器部分还具有多个感测像素和像素栅极，并且多个像素栅极通过所述第二缝合图像传感器部分上的第二条线连接在一起，并且所述第二缝合图像传感器部分上的所述多个像素栅极由 第一个控制信号。 一种用于第一控制信号的驱动器，其中所述驱动器包括用于控制所述第一缝合图像传感器部分的所述多个像素栅极的第一部分，并且所述驱动器还具有由相同的第一控制信号驱动的用于控制所述多个像素的第二部分 所述第二缝合图像传感器部分的门。
-
公开(公告)号：US20130335246A1
公开(公告)日：2013-12-19
申请号：US13907874
申请日：2013-06-01
Applicant: Christophe Basset , Loc Truong , Kevin Stevulak
Inventor： Christophe Basset , Loc Truong , Kevin Stevulak
IPC: H03M1/10
CPC classification number: H03M1/1009 , H03M1/1061 , H03M1/123
Abstract: Calibrating of A/D converters is carried out by obtaining adjustable reference voltages which are used in in A/D conversion, comparing a first divided reference voltage of a full range voltage Vref, with a second divided reference voltage of Vref using analog to digital converters that are used in the A/D conversion; and adjusting at least one of said reference voltages to obtain a set ratio between said multiple ones of said reference voltages. The compared values can include a divided version of Vref, e.g., 3/8 Vref.
Abstract translation: 通过获得在A / D转换中使用的可调参考电压，将全范围电压Vref的第一划分参考电压与使用模数转换器的第二分频参考电压Vref进行比较来进行校准A / D转换器 用于A / D转换; 以及调整所述参考电压中的至少一个以获得所述多个参考电压之间的设定比率。 比较值可以包括Vref的分割版本，例如3 / 8Vref。
-
-
-
-
-
-
-
-
-
Search Results
12
records
(took 0.013 seconds)
