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    Display apparatus having improved static discharge characteristics
    2.
    发明授权
    Display apparatus having improved static discharge characteristics 有权
    具有改善的静电放电特性的显示装置

    公开(公告)号：US08531640B2

    公开(公告)日：2013-09-10

    申请号：US13207367

    申请日：2011-08-10

    申请人： Sang-Hun Jung ,  Dongwuuk Seo ,  Sun-Jung Lee

    发明人： Sang-Hun Jung ,  Dongwuuk Seo ,  Sun-Jung Lee

    IPC分类号： G02F1/1343

    CPC分类号： G02F1/133345 ,  G02F1/134363 ,  G02F1/136204 ,  G02F2001/134372 ,  H01L27/124 ,  H01L29/41733

    摘要： A display apparatus includes a first substrate including a plurality of pixels, a second substrate, and a liquid crystal layer interposed between the first substrate and the second substrate. Each pixel includes a gate electrode, a gate insulating layer, a semiconductor pattern, a source electrode, a drain electrode, a first electrode, and a second electrode. The first electrode includes a first portion overlapping the drain electrode and a second portion outside the first portion, and the second electrode does not overlap the first portion of the first electrode. The first electrode or the second electrode is formed as a single unitary structure.

    摘要翻译： 显示装置包括：第一基板，包括多个像素;第二基板;以及插入在第一基板和第二基板之间的液晶层。 每个像素包括栅电极，栅极绝缘层，半导体图案，源电极，漏电极，第一电极和第二电极。 第一电极包括与漏电极重叠的第一部分和第一部分外部的第二部分，并且第二电极不与第一电极的第一部分重叠。 第一电极或第二电极形成为单个单一结构。

    THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF
    3.
    发明申请
    THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF 有权
    薄膜晶体管阵列及其制造方法

    公开(公告)号：US20120199835A1

    公开(公告)日：2012-08-09

    申请号：US13310078

    申请日：2011-12-02

    申请人： Sang-Hun JUNG ,  Dong Wuuk SEO ,  Gwang-Bum KO ,  Sun-Jung LEE

    发明人： Sang-Hun JUNG ,  Dong Wuuk SEO ,  Gwang-Bum KO ,  Sun-Jung LEE

    IPC分类号： H01L33/08 ,  H01L21/28

    CPC分类号： H01L27/124 ,  H01L29/41733

    摘要： The present invention relates to a thin film transistor array panel and a manufacturing method thereof, and a thin film transistor array panel according to an exemplary embodiment of the present invention includes: a substrate; a first conductive layer disposed on the substrate; a second conductive layer overlapping at least a portion of the edge of the first conductive layer on the first conductive layer and including a first portion overlapping the first conductive layer and a second portion not overlapping the first conductive layer; a first insulating layer disposed on the second conductive layer and having a contact hole exposing at least a portion of a boundary between the first portion and the second portion; and a third conductive layer disposed on the first insulating layer and simultaneously contacting the first portion and the second portion that are exposed through the contact hole.

    摘要翻译： 薄膜晶体管阵列面板及其制造方法技术领域本发明涉及薄膜晶体管阵列面板及其制造方法以及根据本发明示例性实施例的薄膜晶体管阵列面板，其包括：基板; 设置在所述基板上的第一导电层; 第二导电层，与第一导电层上的第一导电层的边缘的至少一部分重叠，并且包括与第一导电层重叠的第一部分和不与第一导电层重叠的第二部分; 第一绝缘层，设置在所述第二导电层上并且具有暴露所述第一部分和所述第二部分之间的边界的至少一部分的接触孔; 以及第三导电层，其设置在所述第一绝缘层上并且同时接触通过所述接触孔暴露的所述第一部分和所述第二部分。

    Defect-resistant thin film transistor array panel and manufacturing method thereof
    5.
    发明授权
    Defect-resistant thin film transistor array panel and manufacturing method thereof 有权
    耐缺陷薄膜晶体管阵列面板及其制造方法

    公开(公告)号：US09048143B2

    公开(公告)日：2015-06-02

    申请号：US13419154

    申请日：2012-03-13

    申请人： Sang-Hun Jung ,  Dong-Wuuk Seo ,  Sun-Jung Lee

    发明人： Sang-Hun Jung ,  Dong-Wuuk Seo ,  Sun-Jung Lee

    IPC分类号： H01L31/00 ,  H01L27/12

    CPC分类号： H01L27/124

    摘要： A thin film transistor array panel according to an exemplary embodiment of the present invention includes a substrate; a gate line disposed on the substrate; a gate insulating layer disposed on the gate line; a semiconductor disposed on the gate insulating layer; a data line disposed on the semiconductor and including a source electrode; a drain electrode disposed on the semiconductor and facing the source electrode; a first electrode disposed on the gate insulating layer; a protection electrode disposed on the data line; a passivation layer disposed on the first electrode and the protection electrode; and a second electrode disposed on the passivation layer, wherein the protection electrode comprises the same material as the first electrode.

    摘要翻译： 根据本发明的示例性实施例的薄膜晶体管阵列面板包括：基板; 设置在基板上的栅极线; 设置在栅极线上的栅极绝缘层; 设置在所述栅极绝缘层上的半导体; 数据线，设置在所述半导体上并且包括源电极; 设置在所述半导体上并面向所述源电极的漏电极; 设置在所述栅极绝缘层上的第一电极; 设置在数据线上的保护电极; 设置在所述第一电极和所述保护电极上的钝化层; 以及设置在所述钝化层上的第二电极，其中所述保护电极包括与所述第一电极相同的材料。

    LIQUID CRYSTAL DISPLAY DEVICE HAVING REDUCED COLOR SHIFT
    6.
    发明申请
    LIQUID CRYSTAL DISPLAY DEVICE HAVING REDUCED COLOR SHIFT 有权
    液晶显示装置，具有减少颜色转换

    公开(公告)号：US20130088668A1

    公开(公告)日：2013-04-11

    申请号：US13428942

    申请日：2012-03-23

    申请人： Joo Hong SEO ,  Jeong Uk Heo ,  Won Jin Kim ,  Seung Jin Kim ,  Sun-Jung Lee ,  Sang-Hun Jung ,  Min Hee Son

    发明人： Joo Hong SEO ,  Jeong Uk Heo ,  Won Jin Kim ,  Seung Jin Kim ,  Sun-Jung Lee ,  Sang-Hun Jung ,  Min Hee Son

    IPC分类号： G02F1/1335 ,  G02F1/1337

    CPC分类号： G02F1/133784 ,  G02F1/133707 ,  G02F1/134363 ,  G02F1/136227 ,  G02F1/136286 ,  G02F2001/134345 ,  G02F2001/134372

    摘要： The present invention relates to a liquid crystal display device that prevents a color shift by allowing two sub-pixel areas to have the same transmittance. A liquid crystal display device according to the present invention includes a data line that includes: a connection portion having a direction of extension perpendicular to that of a gate line; a first portion oriented at a first angle with respect to a direction of extension of the connection portion; and a second portion oriented at a second angle different from the first angle with respect to the direction of extension of the connection portion, and wherein an angle between a rubbing direction of the liquid crystal and the connection portion satisfies θ L = θ 2 - θ 1 2 (where θL is the angle between the rubbing direction of the liquid crystal and the direction of extension of the connection portion, θ1: the first angle, θ2: the second angle).

    摘要翻译： 液晶显示装置技术领域本发明涉及通过使两个子像素区域具有相同的透射率来防止色移的液晶显示装置。 根据本发明的液晶显示装置包括数据线，其包括：具有与栅极线的方向垂直的延伸方向的连接部分; 相对于连接部分的延伸方向以第一角度定向的第一部分; 以及相对于所述连接部的延伸方向以与所述第一角度不同的第二角度定向的第二部分，并且其中所述液晶的摩擦方向与所述连接部分之间的角度满足所述条件; L =＆thetas; 2 - ＆thetas; 1 2（其中＆L; L是液晶的摩擦方向与连接部的延伸方向之间的角度，＆amp; thetas; 1：第一角度＆amp; 2;第二角度）。

    DEFECT-RESISTANT THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF
    7.
    发明申请
    DEFECT-RESISTANT THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF 有权
    防腐薄膜晶体管阵列及其制造方法

    公开(公告)号：US20130015447A1

    公开(公告)日：2013-01-17

    申请号：US13419154

    申请日：2012-03-13

    申请人： Sang-Hun JUNG ,  Dong-Wuuk Seo ,  Sun-Jung Lee

    发明人： Sang-Hun JUNG ,  Dong-Wuuk Seo ,  Sun-Jung Lee

    IPC分类号： H01L33/08 ,  H01L33/42

    CPC分类号： H01L27/124

    摘要： A thin film transistor array panel according to an exemplary embodiment of the present invention includes a substrate; a gate line disposed on the substrate; a gate insulating layer disposed on the gate line; a semiconductor disposed on the gate insulating layer; a data line disposed on the semiconductor and including a source electrode; a drain electrode disposed on the semiconductor and facing the source electrode; a first electrode disposed on the gate insulating layer; a protection electrode disposed on the data line; a passivation layer disposed on the first electrode and the protection electrode; and a second electrode disposed on the passivation layer, wherein the protection electrode comprises the same material as the first electrode.

    摘要翻译： 根据本发明的示例性实施例的薄膜晶体管阵列面板包括：基板; 设置在基板上的栅极线; 设置在栅极线上的栅极绝缘层; 设置在所述栅极绝缘层上的半导体; 数据线，设置在所述半导体上并且包括源电极; 设置在所述半导体上并面向所述源电极的漏电极; 设置在所述栅极绝缘层上的第一电极; 设置在数据线上的保护电极; 设置在所述第一电极和所述保护电极上的钝化层; 以及设置在所述钝化层上的第二电极，其中所述保护电极包括与所述第一电极相同的材料。

    HIGH-VOLTAGE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THEREOF
    8.
    发明申请
    HIGH-VOLTAGE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THEREOF 审中-公开
    高压半导体器件及其制造方法

    公开(公告)号：US20080157198A1

    公开(公告)日：2008-07-03

    申请号：US11926023

    申请日：2007-10-28

    申请人： Ji Hong KIM ,  Sang Hun JUNG

    发明人： Ji Hong KIM ,  Sang Hun JUNG

    IPC分类号： H01L29/78 ,  H01L21/336

    CPC分类号： H01L29/66568 ,  H01L29/7833 ,  H01L29/7836

    摘要： A high-voltage semiconductor device capable of preventing a substrate current from forming is disclosed. The method of manufacturing the high-voltage semiconductor device comprises forming a well in a semiconductor substrate, forming a device isolation film in a portion of the semiconductor substrate, forming a series of drift regions below the surface of the semiconductor substrate, forming a gate electrode on the surface of the semiconductor substrate so as to overlap a portion of at least one drift region, and forming a source and a drain region below the surface of the semiconductor substrate drift regions formed on opposing sides of the gate electrode. Advantageously, the substrate current of the semiconductor device is reduced and the operational withstand voltage is increased, improving the characteristics of the high-voltage transistor.

    摘要翻译： 公开了能够防止基板电流形成的高压半导体器件。 制造高电压半导体器件的方法包括在半导体衬底中形成阱，在半导体衬底的一部分中形成器件隔离膜，在半导体衬底的表面下形成一系列漂移区，形成栅电极 在所述半导体衬底的表面上与所述至少一个漂移区域的一部分重叠，以及在形成在所述栅电极的相对侧上的所述半导体衬底漂移区域的表面下方形成源极和漏极区域。 有利地，半导体器件的衬底电流减小并且操作耐受电压增加，改善了高压晶体管的特性。

    Method for compensating transmission carrier leakage and transceiving circuit embodying the same
    10.
    发明申请
    Method for compensating transmission carrier leakage and transceiving circuit embodying the same 有权
    用于补偿传输载波泄漏的方法和采用其的收发电路

    公开(公告)号：US20080139161A1

    公开(公告)日：2008-06-12

    申请号：US11819943

    申请日：2007-06-29

    申请人： Joonbae Park ,  Kyeongho Lee ,  Sang Hun Jung ,  Eal Wan Lee ,  In Ho Song

    发明人： Joonbae Park ,  Kyeongho Lee ,  Sang Hun Jung ,  Eal Wan Lee ,  In Ho Song

    IPC分类号： H04B1/26

    CPC分类号： H04L27/0014 ,  H04L2027/0016 ,  H04L2027/0022

    摘要： The application discloses embodiments of methods and/or systems for compensating a transmission carrier leakage of an up-conversion mixer, a tranceiving circuit or apparatus embodying the same. One embodiment of a method can include detecting an I channel DC offset DCI0 and a Q channel DC offset DCQ0 generated by a reception carrier leakage from an output of a down-conversion mixer, detecting an I channel DC offset DCI and a Q channel DC offset DCQ from the output of the down-conversion mixer while varying a compensation parameter being inputted to an up-conversion mixer that has its output coupled to an input of the down-conversion mixer to determine the compensation parameter that can reduce or minimize a transmission carrier leakage. A combination of a transmission baseband signal and the determined compensation parameter can be transmitted using the up-conversion mixer and an antenna to compensate for the transmission carrier leakage.

    摘要翻译： 本申请公开了用于补偿上变频混频器，引入电路或体现其的转换电路或设备的传输载波泄漏的方法和/或系统的实施例。 方法的一个实施例可以包括从下行链路的输出检测由接收载波泄漏产生的I信道DC偏移DCI 0和Q信道DC偏移DCQ <0> 转换混频器，从下转换混频器的输出端检测I信道DC偏移DCI和Q信道DC偏移DCQ，同时改变输入到上变频混频器的补偿参数，该上变频混频器的输出耦合到下变频混频器的输入 转换混频器来确定可以减少或最小化传输载波泄漏的补偿参数。 传输基带信号和所确定的补偿参数的组合可以使用上变频混频器和天线来传输，以补偿传输载波泄漏。