Variable-capacitance circuit element
    1.
    发明授权
    Variable-capacitance circuit element 有权
    可变电容电路元件

    公开(公告)号:US07408422B2

    公开(公告)日:2008-08-05

    申请号:US11464946

    申请日:2006-08-16

    CPC classification number: H03B5/04 H03B5/1206 H03B5/1253 H03B5/1265

    Abstract: An electronic circuit element has two capacitance values selected by means of a main control signal. The electronic circuit element comprises two variable-capacitance electronic components connected in parallel and each receiving opposite intermediate control signals, derived from the main control signal. The two variable-capacitance components are differentiated by a configuration parameter. The electronic circuit element exhibits a variation in capacitance corresponding to a difference between respective variations in capacitance of the two variable-capacitance electronic components during an inversion of the main control signal. The variation in capacitance of the electronic circuit element may be less than 5 attoFarads.

    Abstract translation: 电子电路元件具有通过主控制信号选择的两个电容值。 电子电路元件包括并联连接的两个可变电容电子元件,并且各自接收来自主控制信号的相反的中间控制信号。 两个可变电容分量由配置参数区分。 电子电路元件在主控制信号的反转期间呈现出与两个可变电容电子部件的电容的各自变化的差异的电容变化。 电子电路元件的电容变化可能小于5attoFarads。

    VARIABLE-CAPACITANCE CIRCUIT ELEMENT
    2.
    发明申请
    VARIABLE-CAPACITANCE CIRCUIT ELEMENT 有权
    可变电容电路元件

    公开(公告)号:US20070075791A1

    公开(公告)日:2007-04-05

    申请号:US11464946

    申请日:2006-08-16

    CPC classification number: H03B5/04 H03B5/1206 H03B5/1253 H03B5/1265

    Abstract: An electronic circuit element has two capacitance values selected by means of a main control signal. The electronic circuit element comprises two variable-capacitance electronic components connected in parallel and each receiving opposite intermediate control signals, derived from the main control signal. The two variable-capacitance components are differentiated by a configuration parameter. The electronic circuit element exhibits a variation in capacitance corresponding to a difference between respective variations in capacitance of the two variable-capacitance electronic components during an inversion of the main control signal. The variation in capacitance of the electronic circuit element may be less than 5 attoFarads.

    Abstract translation: 电子电路元件具有通过主控制信号选择的两个电容值。 电子电路元件包括并联连接的两个可变电容电子元件,并且各自接收来自主控制信号的相反的中间控制信号。 两个可变电容分量由配置参数区分。 电子电路元件在主控制信号的反转期间呈现出与两个可变电容电子部件的电容的各自变化的差异的电容变化。 电子电路元件的电容变化可能小于5attoFarads。

    Digital word representative of a non-integer ratio between the respective periods of two signals
    4.
    发明申请
    Digital word representative of a non-integer ratio between the respective periods of two signals 有权
    表示两个信号的各个周期之间的非整数比的数字字

    公开(公告)号:US20080043894A1

    公开(公告)日:2008-02-21

    申请号:US11891773

    申请日:2007-08-13

    CPC classification number: H03D13/00 H03L7/08 H03L2207/12 H03L2207/50

    Abstract: A phase-locked loop circuit having a comparator that receives a target digital word representative of a non-integer target ratio between a main signal and a reference signal having a reference frequency. The circuit also includes digitally-controlled oscillator coupled to the comparator to deliver an output signal. One return loop is coupled between the output of the oscillator and the comparator. The latter includes a device to generate a digital word representing the non-integer ratio between the period of the reference signal and the period of the output signal, the reference signal and the output signal respectively corresponding to the first and second signal, and the fixed integer part N being equal to the integer part of the target non-integer ratio. The comparator compares the digital word and target digital word. The oscillator adjusts the frequency of the output signal as a function of the result delivered by the comparator.

    Abstract translation: 一种锁相环电路,具有比较器,该比较器接收表示主信号与具有参考频率的参考信号之间的非整数目标比的目标数字字。 电路还包括耦合到比较器的数字控制振荡器以传送输出信号。 一个回路耦合在振荡器的输出和比较器之间。 后者包括一个生成表示参考信号的周期与分别对应于第一和第二信号的输出信号,参考信号和输出信号的周期之间的非整数比的数字字的装置,以及固定的 整数部分N等于目标非整数比的整数部分。 比较器比较数字字和目标数字字。 振荡器根据比较器提供的结果调整输出信号的频率。

    Method of correcting the phase difference between two input signals of a phase-locked loop and associated device
    5.
    发明申请
    Method of correcting the phase difference between two input signals of a phase-locked loop and associated device 有权
    校正锁相环和相关设备的两个输入信号之间的相位差的方法

    公开(公告)号:US20060132245A1

    公开(公告)日:2006-06-22

    申请号:US11304382

    申请日:2005-12-15

    CPC classification number: H03L7/087 H03L7/085 H03L7/0895

    Abstract: A method for correcting the phase difference between two input signals of a phase-locked loop may include a charge pump connected to a filter. Prior to the occurrence of the first of the two input signals, a calibration phase may be carried out in which the input of the filter is disconnected from the output of the charge pump, the output voltage from the charge pump is equalized, to within a given error, with the input voltage of the filter, the amplitudes of the opposing currents flowing in the charge pump being equalized. Then, during the two respective occurrences of the two input signals, the input of the filter is reconnected to the output of the charge pump, and two phase-shifted signals that are delayed with respect to the input signals are respectively generated, in response to which the two opposing currents are, respectively and successively, interrupted, before the calibration phase is recommenced.

    Abstract translation: 用于校正锁相环路的两个输入信号之间的相位差的方法可以包括连接到滤波器的电荷泵。 在发生两个输入信号中的第一个信号之前,可以执行校准阶段,其中滤波器的输入与电荷泵的输出断开,来自电荷泵的输出电压相等, 给定误差,在滤波器的输入电压下,在电荷泵中流动的相对电流的幅度相等。 然后,在两个输入信号的两个相应出现期间,滤波器的输入被重新连接到电荷泵的输出,并且分别产生相对于输入信号延迟的两个相移信号,响应于 在校准阶段重新开始之前,两个相对的电流分别和相继地中断。

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