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14 条记录 (耗时 0.016 秒)

    Method for fabricating semiconductor device
    1.
    发明授权
    Method for fabricating semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号：US06709939B2

    公开(公告)日：2004-03-23

    申请号：US10409964

    申请日：2003-04-09

    申请人： Hi Deok Lee ,  Seong Hyung Park

    发明人： Hi Deok Lee ,  Seong Hyung Park

    IPC分类号： H01L21336

    CPC分类号： H01L29/6659 ,  H01L29/665 ,  H01L29/7833

    摘要： A method for fabricating a semiconductor device is disclosed. In a high speed device structure consisting of a salicide, in order to fabricate a device having at least two gate oxide structures in the identical chip, an LDD region of a core device region is formed, and an ion implant process for forming the LDD region of an input/output device region having a thick gate oxide and a process for forming a source/drain region at the rim of a field oxide of the core device region having a thin gate oxide are performed at the same time, thereby increasing a depth of a junction region. Thus, the junction leakage current is decreased in the junction region of the peripheral circuit region, and the process is simplified. As a result, a process yield and reliability of the device are improved.

    摘要翻译： 公开了一种制造半导体器件的方法。 在由自对准硅化物组成的高速装置结构中，为了制造在同一芯片中具有至少两个栅极氧化物结构的器件，形成芯部器件区域的LDD区域，形成LDD区域的离子注入工艺 具有厚栅极氧化物的输入/输出器件区域和用于在具有薄栅极氧化物的芯器件区域的场氧化物的边缘处形成源极/漏极区域的工艺同时进行，从而增加深度 的连接区域。 因此，在外围电路区域的结区域中结漏电流减小，并且处理简化。 结果，改善了设备的工艺成品率和可靠性。

    Method of fabricating a transistor in a semiconductor device
    2.
    发明授权
    Method of fabricating a transistor in a semiconductor device 失效
    在半导体器件中制造晶体管的方法

    公开(公告)号：US06569737B2

    公开(公告)日：2003-05-27

    申请号：US09818759

    申请日：2001-03-28

    申请人： Seong-Hyung Park ,  Myoung-Jun Jang

    发明人： Seong-Hyung Park ,  Myoung-Jun Jang

    IPC分类号： H01L21336

    CPC分类号： H01L29/66621 ,  H01L21/76237

    摘要： Forming a semiconductor transistor by embedding the gate electrode into the substrate so that a step difference between the gate electrode and the source or drain region is reduced. Device isolation areas are defined by forming at least two first trenches having a first depth. The gate electrode is formed in a second trench located between the first trenches at a second depth being less than the first depth. A source and a drain are respectively formed between the gate electrode and the device isolation areas. The gate electrically connects the source and drain to form a semiconductor channel in the substrate.

    摘要翻译： 通过将栅电极嵌入衬底中形成半导体晶体管，使得栅电极和源极或漏极区之间的阶跃差减小。 通过形成具有第一深度的至少两个第一沟槽来限定器件隔离区域。 栅极电极形成在位于第一沟槽之间的第二沟槽中，第二沟槽的第二深度小于第一深度。 源极和漏极分别形成在栅电极和器件隔离区之间。 栅极电连接源极和漏极，以在衬底中形成半导体沟道。

    Method of fabricating semiconductor device
    3.
    发明授权
    Method of fabricating semiconductor device 失效
    制造半导体器件的方法

    公开(公告)号：US06319803B1

    公开(公告)日：2001-11-20

    申请号：US09373001

    申请日：1999-08-12

    申请人： Seong-Hyung Park

    发明人： Seong-Hyung Park

    IPC分类号： H01L2144

    CPC分类号： H01L21/76895

    摘要： A method of fabricating a semiconductor device is disclosed in the present invention. The method includes the steps of forming first and second wells in the substrate, the first and second wells having first and second type conductivities, respectively, forming first, second, and third isolation layers in the substrate, forming first and second gate oxide layers on the first and second wells, forming first and second buried contact regions in the substrate, and forming first and second impurity regions in the first and second buried contact regions, and forming first and second gates on the first well and third and fourth gates on the second well, the first and fourth gates directly contacting the first and second buried contact regions, respectively.

    摘要翻译： 在本发明中公开了制造半导体器件的方法。 该方法包括以下步骤：在衬底中形成第一阱和第二阱，第一阱和第二阱分别具有第一和第二类型电导率，在衬底中形成第一和第二隔离层，在衬底上形成第一和第二栅极氧化物层 在第一和第二阱中，在衬底中形成第一和第二掩埋接触区，以及在第一和第二掩埋接触区中形成第一和第二杂质区，以及在第一阱和第三和第四栅极上形成第一和第二栅极 第二阱，第一和第四栅极分别直接接触第一和第二埋入接触区域。

    Pixel array, image sensor including the same, and method of driving the same
    5.
    发明授权
    Pixel array, image sensor including the same, and method of driving the same 有权

    公开(公告)号：US09881953B2

    公开(公告)日：2018-01-30

    申请号：US14111628

    申请日：2011-04-29

    申请人： Seong Hyung Park

    发明人： Seong Hyung Park

    IPC分类号： H01L27/146 ,  H04N5/355

    CPC分类号： H01L27/14612 ,  H01L27/14609 ,  H04N5/35572 ,  H04N5/3559

    摘要： Disclosed are a pixel array, an image sensor including the same, and a method of driving the same. In a WDR (Wide Dynamic Range) pixel employing a storage region (FD node) including a varactor, a reset voltage, which is less than a voltage applied to a reset transistor according to the related art, that is, a partial reset voltage is applied to the reset transistor to read out a reset signal level for a CDS (Correlated Double Sampling) operation, thereby adjusting the operating voltage range of the storage region. The operating voltage range of the storage region is shifted into a range suitable for remarkably varying the capacitance of the varactor, thereby expanding the dynamic range.

    PIXEL ARRARY, IMAGE SENSOR INCLUDING THE SAME, AND METHOD OF DRIVING THE SAME
    6.
    发明申请
    PIXEL ARRARY, IMAGE SENSOR INCLUDING THE SAME, AND METHOD OF DRIVING THE SAME 有权
    像素图像，包括它们的图像传感器及其驱动方法

    公开(公告)号：US20140117206A1

    公开(公告)日：2014-05-01

    申请号：US14111628

    申请日：2011-04-29

    申请人： Seong Hyung Park

    发明人： Seong Hyung Park

    IPC分类号： H01L27/146

    CPC分类号： H01L27/14612 ,  H01L27/14609 ,  H04N5/35572 ,  H04N5/3559

    摘要： Disclosed are a pixel array, an image sensor including the same, and a method of driving the same. In a WDR (Wide Dynamic Range) pixel employing a storage region (FD node) including a varactor, a reset voltage, which is less than a voltage applied to a reset transistor according to the related art, that is, a partial reset voltage is applied to the reset transistor to read out a reset signal level for a CDS (Correlated Double Sampling) operation, thereby adjusting the operating voltage range of the storage region. The operating voltage range of the storage region is shifted into a range suitable for remarkably varying the capacitance of the varactor, thereby expanding the dynamic range.

    摘要翻译： 公开了一种像素阵列，包括该像素阵列的图像传感器及其驱动方法。 在采用包括变容二极管的存储区域（FD节点）的WDR（宽动态范围）像素中，复位电压小于根据现有技术的施加到复位晶体管的电压，即部分复位电压为 施加到复位晶体管以读出用于CDS（相关双采样）操作的复位信号电平，由此调整存储区域的工作电压范围。 存储区域的工作电压范围移动到适于显着改变变容二极管的电容的范围内，从而扩大动态范围。

    PIXEL, PIXEL ARRAY, IMAGE SENSOR INCLUDING PIXEL ARRAY, AND METHOD OF DRIVING PIXEL ARRAY
    9.
    发明申请
    PIXEL, PIXEL ARRAY, IMAGE SENSOR INCLUDING PIXEL ARRAY, AND METHOD OF DRIVING PIXEL ARRAY 有权
    像素，像素阵列，包括像素阵列的图像传感器和驱动像素阵列的方法

    公开(公告)号：US20140117205A1

    公开(公告)日：2014-05-01

    申请号：US14111618

    申请日：2011-04-29

    申请人： Seong Hyung Park

    发明人： Seong Hyung Park

    IPC分类号： H01L27/146

    CPC分类号： H01L27/14612 ,  H01L27/14609 ,  H01L27/14643 ,  H04N5/35572 ,  H04N5/3559

    摘要： Provided are a pixel, a pixel array, an image sensor including the pixel array, and a method of driving the pixel array. The pixel includes a photoelectric converter, a capacitor, and a switching element. The capacitor accumulates electric charges converted by the photoelectric converter. The switching element outputs a potential of the capacitor. The switching element includes a transfer switching element transferring the electric charges, converted in the photoelectric converter, to the capacitor. The capacitor serves as a storage through multi-clocking of the transfer switching element.

    摘要翻译： 提供像素，像素阵列，包括像素阵列的图像传感器以及驱动像素阵列的方法。 像素包括光电转换器，电容器和开关元件。 电容器累积由光电转换器转换的电荷。 开关元件输出电容器的电位。 开关元件包括将在光电转换器中转换的电荷转移到电容器的转移开关元件。 电容器通过转换开关元件的多时钟作为存储器。