Multi-network compatible data architecture
    1.
    发明授权
    Multi-network compatible data architecture 有权
    多网络兼容数据架构

    公开(公告)号:US08588209B2

    公开(公告)日:2013-11-19

    申请号:US11737800

    申请日:2007-04-20

    IPC分类号: H04J3/06

    CPC分类号: H04Q11/0478

    摘要: A backbone network, comprising a network switch configured to communicate data over Ethernet and SONET/SDH interfaces without encapsulating the data. Also disclosed is a backbone network, comprising a plurality of synchronized network switches, wherein the switches are configured to communicate a plurality of time division multiplexed data streams across at least part of the network via a plurality of Ethernet interfaces and a plurality of SONET/SDH interfaces, and wherein the switches are configured to communicate the data streams without encapsulating the data streams.

    摘要翻译: 一种骨干网络,包括被配置为通过以太网和SONET / SDH接口传送数据的网络交换机,而不封装数据。 还公开了一种骨干网络,其包括多个同步的网络交换机,其中,所述交换机被配置为经由多个以太网接口和多个SONET / SDH在所述网络的至少一部分上传送多个时分多路复用数据流 接口,并且其中所述交换机被配置为在不封装所述数据流的情况下传送所述数据流。

    Inter-packet gap network clock synchronization
    2.
    发明授权
    Inter-packet gap network clock synchronization 有权
    分组间隙网络时钟同步

    公开(公告)号:US08295310B2

    公开(公告)日:2012-10-23

    申请号:US11735590

    申请日:2007-04-16

    IPC分类号: H04J3/06

    摘要: A network component comprising at least one processor configured to implement a method comprising adding a clock synchronization data to a data stream comprising a plurality of Ethernet packets, wherein the clock synchronization data is located in a gap between two of the Ethernet packets. Also disclosed is a method comprising adding a clock synchronization data to a gap between a plurality of Ethernet packets in a data stream, wherein the clock synchronization data comprises a timestamp, a first bit that indicates whether the clock synchronization data is a request or an acknowledgement, and a second bit that indicates a requested operational mode.

    摘要翻译: 一种网络组件,包括至少一个处理器,其被配置为实现包括将时钟同步数据添加到包括多个以太网分组的数据流的方法,其中时钟同步数据位于两个以太网分组之间的间隙中。 还公开了一种方法,包括将时钟同步数据添加到数据流中的多个以太网分组之间的间隙,其中时钟同步数据包括时间戳,指示时钟同步数据是请求还是确认的第一位 ,以及指示所请求的操作模式的第二位。

    Multiplexed data stream timeslot map
    3.
    发明授权
    Multiplexed data stream timeslot map 有权
    多路复用数据流时隙映射

    公开(公告)号:US07961751B2

    公开(公告)日:2011-06-14

    申请号:US11735602

    申请日:2007-04-16

    IPC分类号: H04B7/212 H04J3/00

    摘要: A network component comprising a processor configured to implement a method comprising promoting the communication of a frame within a synchronization window, wherein the frame comprises a plurality of data types assigned to a plurality of timeslots, and a timeslot map indicating the data type assigned to each timeslot. Also disclosed is a method comprising receiving a data stream comprising a data structure comprising a plurality of timeslots, each timeslot carrying one of a plurality of data types, receiving a timeslot map indicating the data types assigned to each of the timeslots, and processing each timeslot in accordance with the timeslot map.

    摘要翻译: 一种网络组件,包括被配置为实现包括促进同步窗口内的帧的通信的方法的处理器,其中所述帧包括分配给多个时隙的多个数据类型,以及指示分配给每个时隙的数据类型的时隙映射 时隙。 还公开了一种方法,包括接收包括包括多个时隙的数据结构的数据流,每个时隙携带多种数据类型中的一种,接收指示分配给每个时隙的数据类型的时隙映射,以及处理每个时隙 按照时间图映射。

    Network Clock Synchronization Floating Window and Window Delineation
    4.
    发明申请
    Network Clock Synchronization Floating Window and Window Delineation 有权
    网络时钟同步浮动窗口和窗口划分

    公开(公告)号:US20100316069A1

    公开(公告)日:2010-12-16

    申请号:US12862521

    申请日:2010-08-24

    IPC分类号: H04J3/06

    摘要: A network component comprising at least one processor configured to implement a method comprising initiating a synchronization window, and promoting the transmission of a frame comprising a control symbol, wherein the control symbol delineates a beginning of the frame, and wherein the control symbol is offset from the beginning of the synchronization window. Also disclosed is a system comprising an upstream node in communication with a downstream node, wherein the upstream node transmits a data stream comprising a plurality of frames to the downstream node, wherein the data stream is organized into a plurality of synchronization windows, and wherein the frames float within the synchronization windows. Included is a method comprising transmitting an Ethernet data stream comprising an Ethernet control symbol, wherein the Ethernet control symbol is transmitted within a synchronization window and delineates a start of a packet within the synchronization window.

    摘要翻译: 一种网络组件,包括至少一个处理器,其被配置为实现包括启动同步窗口的方法,以及促进包括控制符号的帧的传输,其中所述控制符号描绘所述帧的开始,并且其中所述控制符号偏离 同步窗口的开始。 还公开了一种包括与下游节点通信的上游节点的系统,其中上游节点向下游节点发送包括多个帧的数据流,其中数据流被组织成多个同步窗口,并且其中, 帧在同步窗口内浮动。 包括发送包括以太网控制符号的以太网数据流的方法,其中在同步窗口内发送以太网控制符号并且描绘同步窗口内的分组的开始。

    Network clock synchronization floating window and window delineation
    5.
    发明授权
    Network clock synchronization floating window and window delineation 有权
    网络时钟同步浮动窗口和窗口划分

    公开(公告)号:US07809027B2

    公开(公告)日:2010-10-05

    申请号:US11735598

    申请日:2007-04-16

    IPC分类号: H04J3/06

    摘要: A network component comprising at least one processor configured to implement a method comprising initiating a synchronization window, and promoting the transmission of a frame comprising a control symbol, wherein the control symbol delineates a beginning of the frame, and wherein the control symbol is offset from the beginning of the synchronization window. Also disclosed is a system comprising an upstream node in communication with a downstream node, wherein the upstream node transmits a data stream comprising a plurality of frames to the downstream node, wherein the data stream is organized into a plurality of synchronization windows, and wherein the frames float within the synchronization windows. Included is a method comprising transmitting an Ethernet data stream comprising an Ethernet control symbol, wherein the Ethernet control symbol is transmitted within a synchronization window and delineates a start of a packet within the synchronization window.

    摘要翻译: 一种网络组件,包括至少一个处理器,其被配置为实现包括启动同步窗口的方法,以及促进包括控制符号的帧的传输,其中所述控制符号描绘所述帧的开始,并且其中所述控制符号偏离 同步窗口的开始。 还公开了一种包括与下游节点通信的上游节点的系统,其中上游节点向下游节点发送包括多个帧的数据流,其中数据流被组织成多个同步窗口,并且其中, 帧在同步窗口内浮动。 包括发送包括以太网控制符号的以太网数据流的方法,其中在同步窗口内发送以太网控制符号并且描绘同步窗口内的分组的开始。

    Multi-component compatible data architecture
    6.
    发明授权
    Multi-component compatible data architecture 有权
    多组件兼容数据架构

    公开(公告)号:US07675945B2

    公开(公告)日:2010-03-09

    申请号:US11737803

    申请日:2007-04-20

    IPC分类号: H04J3/07

    CPC分类号: H04J3/1611

    摘要: A backbone network, comprising a first switch comprising a first port configured to communicate a data stream via an Ethernet interface, and a second port configured to communicate the data stream via a SONET/SDH interface, and a second switch comprising a third port configured to receive the data stream from the first switch via the Ethernet interface, wherein the first switch and the second switch are synchronized.

    摘要翻译: 一种骨干网络,包括第一交换机,包括被配置为经由以太网接口传送数据流的第一端口和被配置为经由SONET / SDH接口传送数据流的第二端口,以及第二交换机,其包括被配置为 经由以太网接口从第一交换机接收数据流,其中第一交换机和第二交换机是同步的。

    Multiplexed data stream circuit architecture
    7.
    发明授权
    Multiplexed data stream circuit architecture 有权
    多路复用数据流电路架构

    公开(公告)号:US08837492B2

    公开(公告)日:2014-09-16

    申请号:US13162803

    申请日:2011-06-17

    摘要: An apparatus comprising an ingress controller configured to receive a data frame comprising a high priority data and a low priority data, and an ingress buffer coupled to the ingress controller and configured to buffer the low priority data, wherein the high priority data is not buffered. Also disclosed is a network component, comprising an ingress controller configured to receive a data stream comprising high priority data and low priority data, and an ingress buffer coupled to the ingress controller and configured to receive, buffer, and send the low priority data, and further configured to receive a flow control indication, wherein the ingress buffer varies an amount of the low priority data sent from the ingress buffer in accordance with the flow control indication.

    摘要翻译: 一种装置,包括入口控制器,其被配置为接收包括高优先级数据和低优先级数据的数据帧,以及耦合到所述入口控制器并被配置为缓冲所述低优先级数据的入口缓冲器,其中所述高优先级数据未被缓冲。 还公开了一种网络组件,包括入口控制器,其被配置为接收包括高优先级数据和低优先级数据的数据流,以及耦合到入口控制器并被配置为接收,缓冲和发送低优先级数据的入口缓冲器,以及 还被配置为接收流控制指示,其中所述入口缓冲器根据所述流控制指示改变从所述入口缓冲器发送的所述低优先级数据的量。

    Multi-component compatible data architecture
    8.
    发明授权
    Multi-component compatible data architecture 有权
    多组件兼容数据架构

    公开(公告)号:US08401010B2

    公开(公告)日:2013-03-19

    申请号:US12691367

    申请日:2010-01-21

    IPC分类号: H04L12/28

    CPC分类号: H04J3/1611

    摘要: A backbone network, comprising a first switch comprising a first port configured to communicate a data stream via an Ethernet interface, and a second port configured to communicate the data stream via a SONET/SDH interface, and a second switch comprising a third port configured to receive the data stream from the first switch via the Ethernet interface, wherein the first switch and the second switch are synchronized.

    摘要翻译: 一种骨干网络,包括第一交换机,第一交换机包括被配置为经由以太网接口传送数据流的第一端口和被配置为经由SONET / SDH接口传送数据流的第二端口,以及第二交换机,其包括被配置为 经由以太网接口从第一交换机接收数据流,其中第一交换机和第二交换机是同步的。

    Multiplexed data stream payload format
    9.
    发明授权
    Multiplexed data stream payload format 有权
    多路复用数据流有效载荷格式

    公开(公告)号:US08340101B2

    公开(公告)日:2012-12-25

    申请号:US11735591

    申请日:2007-04-16

    IPC分类号: H04L12/56

    摘要: A network component comprising a processor configured to implement a method comprising promoting the communication of a frame of octet-sized timeslots, wherein the timeslots are configured to carry a plurality of data types. Also disclosed is a method comprising communicating a high priority data and a low priority data in a frame comprising a plurality of octet-sized timeslots, wherein each timeslot is assigned to the high priority data or the low priority data, wherein the high priority data is provided in the timeslots assigned to the high priority data, and wherein the low priority data is provided in the timeslots assigned to the low priority data. Also disclosed is a network component comprising a processor configured to implement a method comprising recognizing the reception of a plurality of data streams each having a priority, and promoting the multiplexing of the data streams based on the priority of each data stream.

    摘要翻译: 一种网络组件,包括被配置为实现包括促进八位字节大小的时隙的帧的通信的方法的处理器,其中所述时隙被配置为携带多个数据类型。 还公开了一种方法,包括在包括多个八位字节大小的时隙的帧中传送高优先级数据和低优先级数据,其中每个时隙被分配给高优先级数据或低优先级数据,其中高优先级数据是 提供在分配给高优先级数据的时隙中,并且其中在分配给低优先级数据的时隙中提供低优先级数据。 还公开了一种网络组件,包括处理器,该处理器被配置为实现一种方法,包括识别各自具有优先级的多个数据流的接收,并且基于每个数据流的优先级来促进数据流的复用。

    Multi-component compatible data architecture
    10.
    发明授权
    Multi-component compatible data architecture 有权
    多组件兼容数据架构

    公开(公告)号:US08289962B2

    公开(公告)日:2012-10-16

    申请号:US12691372

    申请日:2010-01-21

    IPC分类号: H04L12/28

    CPC分类号: H04J3/1611

    摘要: A backbone network, comprising a first switch comprising a first port configured to communicate a data stream via an Ethernet interface, and a second port configured to communicate the data stream via a SONET/SDH interface, and a second switch comprising a third port configured to receive the data stream from the first switch via the Ethernet interface, wherein the first switch and the second switch are synchronized.

    摘要翻译: 一种骨干网络,包括第一交换机,第一交换机包括被配置为经由以太网接口传送数据流的第一端口和被配置为经由SONET / SDH接口传送数据流的第二端口,以及第二交换机,其包括被配置为 经由以太网接口从第一交换机接收数据流,其中第一交换机和第二交换机是同步的。