公开(公告)号：US20090058432A1

公开(公告)日：2009-03-05

申请号：US12219185

申请日：2008-07-17

申请人： Jun Hashimoto ,  Shinji Kawada ,  Ikuo Kurachi ,  Seiji Samukawa

发明人： Jun Hashimoto ,  Shinji Kawada ,  Ikuo Kurachi ,  Seiji Samukawa

IPC分类号： G01R27/02

CPC分类号： H01L22/14 ,  H01L2924/0002 ,  H01L2924/00

摘要： An ultraviolet light monitoring system includes first and second electrodes, an evaluation subject film and a power source. The first and second electrodes are opposingly disposed and attract holes which are generated in accordance with irradiation of ultraviolet light. The evaluation subject film is formed in a vicinity of the first and second electrodes, and is a subject of evaluation of damage caused by the irradiation of ultraviolet light. The power source, at times of monitoring of the ultraviolet light, applies a predetermined bias to a series path formed by the first electrode, a gap between the first and second electrodes, and the second electrode.

摘要翻译： 紫外线监视系统包括第一和第二电极，评估对象胶片和电源。 第一和第二电极相对设置并且吸引根据紫外线的照射产生的孔。 评估对象膜形成在第一和第二电极附近，并且是评估由紫外线照射引起的损伤的对象。 在监视紫外线的时候，电源对由第一电极形成的串联路径，第一和第二电极与第二电极之间的间隙施加预定的偏压。

公开(公告)号：US20080268648A1

公开(公告)日：2008-10-30

申请号：US12101334

申请日：2008-04-11

申请人： Shinji Kawada

发明人： Shinji Kawada

IPC分类号： H01L21/3065

CPC分类号： H01L21/31116 ,  H01L21/76802 ,  H01L21/76805

摘要： Disclosed is a means for stabilizing quality of a semiconductor device by preventing projections from being formed in the bottom of a through hole. A method of manufacturing a semiconductor device includes a process of forming a through hole reaching a metal nitride layer through an interlayer insulating layer on a semiconductor wafer on which the wiring layer, the metal nitride layer formed on the wiring layer, and the interlayer insulating layer covering the wiring layer and the metal nitride layer are formed. The through hole forming process includes: a first etching step of etching the interlayer insulating layer by an anisotropic etching method with the semiconductor wafer set to a first temperature; and a second etching step of etching an upper surface of metal nitride layer by an anisotropic etching method with the semiconductor wafer set to a second temperature higher than the first temperature.

摘要翻译： 公开了一种通过防止在通孔的底部形成突起来稳定半导体器件的质量的手段。 一种制造半导体器件的方法包括：在半导体晶片上形成通过层间绝缘层到达金属氮化物层的通孔的工艺，其中布线层，形成在布线层上的金属氮化物层和层间绝缘层 覆盖布线层和金属氮化物层。 通孔形成工艺包括：第一蚀刻步骤，通过使半导体晶片设定为第一温度的各向异性蚀刻方法蚀刻层间绝缘层; 以及第二蚀刻步骤，通过各向异性蚀刻方法蚀刻金属氮化物层的上表面，半导体晶片设置为高于第一温度的第二温度。

公开(公告)号：US07732783B2

公开(公告)日：2010-06-08

申请号：US12219185

申请日：2008-07-17

申请人： Jun Hashimoto ,  Shinji Kawada ,  Ikuo Kurachi ,  Seiji Samukawa

发明人： Jun Hashimoto ,  Shinji Kawada ,  Ikuo Kurachi ,  Seiji Samukawa

IPC分类号： G01J1/10

CPC分类号： H01L22/14 ,  H01L2924/0002 ,  H01L2924/00

摘要： An ultraviolet light monitoring system includes first and second electrodes, an evaluation subject film and a power source. The first and second electrodes are opposingly disposed and attract holes which are generated in accordance with irradiation of ultraviolet light. The evaluation subject film is formed in a vicinity of the first and second electrodes, and is a subject of evaluation of damage caused by the irradiation of ultraviolet light. The power source, at times of monitoring of the ultraviolet light, applies a predetermined bias to a series path formed by the first electrode, a gap between the first and second electrodes, and the second electrode.

摘要翻译： 紫外线监视系统包括第一和第二电极，评估对象胶片和电源。 第一和第二电极相对设置并且吸引根据紫外线的照射产生的孔。 评估对象膜形成在第一和第二电极附近，并且是评估由紫外线照射引起的损伤的对象。 在监视紫外线的时候，电源对由第一电极形成的串联路径，第一和第二电极与第二电极之间的间隙施加预定的偏压。

公开(公告)号：US20090164040A1

公开(公告)日：2009-06-25

申请号：US12314459

申请日：2008-12-11

申请人： Shinji Kawada

发明人： Shinji Kawada

IPC分类号： G06F19/00

CPC分类号： G05B19/4183 ,  G05B2219/32127 ,  G05B2219/45031 ,  Y02P90/10

摘要： A method of processing semiconductor substrates includes the steps of: storing attribution data indicating an attribution of each of the semiconductor substrates in a recording medium according to piece identification codes of the semiconductor substrates; generating a start direction accompanying one of the piece identification codes of the semiconductor substrates with a control unit; retrieving the attribution data corresponding to one of the semiconductor substrate related to the start direction from the recording medium with a processing condition setting unit; selecting one of processing conditions according to the attribution data thus retrieved and a processing condition determining table in which a plurality of the processing conditions is set according to the attributions of the semiconductor substrates with the processing condition setting unit; and processing one of the semiconductor substrates related to the start direction under the one of the processing conditions thus selected with a processing unit.

摘要翻译： 处理半导体衬底的方法包括以下步骤：根据半导体衬底的片段识别码，将表示每个半导体衬底的属性的属性数据存储在记录介质中; 利用控制单元产生伴随着半导体衬底的片段识别码之一的起始方向; 用处理条件设置单元从记录介质中检索对应于与开始方向相关的半导体衬底之一的属性数据; 根据如此检索的属性数据选择处理条件之一;以及处理条件确定表，其中根据半导体衬底与处理条件设置单元的属性设置多个处理条件; 以及在由所述处理单元选择的所述处理条件之一下，处理与所述开始方向相关的所述半导体基板之一。

公开(公告)号：US20100068836A1

公开(公告)日：2010-03-18

申请号：US12546745

申请日：2009-08-25

申请人： Youichi Yatagai ,  Shinji Kawada ,  Seiji Samukawa

发明人： Youichi Yatagai ,  Shinji Kawada ,  Seiji Samukawa

IPC分类号： H01L21/66

CPC分类号： H01L22/20 ,  H01L22/14

摘要： A method of measuring a resistivity of a sidewall of a contact hole formed in a semiconductor device, wherein said semiconductor device includes a first electrode formed on a substrate; a second electrode formed on the first electrode with an insulating film in between; a resist pattern formed on the first electrode and the second electrode; a contact hole formed in the first electrode and the second electrode; and an organic film deposited on the sidewall of the contact hole, includes the steps of: placing a probe needle on the first electrode and the second electrode so that the probe needle contacts with the first electrode and the second electrode several times; establishing electrical conductivity of the probe needle relative to the first electrode and the second electrode; and measuring the resistivity of the organic film between the first electrode and the second electrode.

摘要翻译： 一种测量形成在半导体器件中的接触孔的侧壁的电阻率的方法，其中所述半导体器件包括形成在衬底上的第一电极; 在第一电极上形成有绝缘膜的第二电极; 形成在所述第一电极和所述第二电极上的抗蚀剂图案; 形成在所述第一电极和所述第二电极中的接触孔; 和沉积在接触孔的侧壁上的有机膜包括以下步骤：将探针放置在第一电极和第二电极上，使得探针与第一电极和第二电极接触数次; 建立探针相对于第一电极和第二电极的导电性; 并测量第一电极和第二电极之间的有机膜的电阻率。

公开(公告)号：US07923268B2

公开(公告)日：2011-04-12

申请号：US12546745

申请日：2009-08-25

申请人： Youichi Yatagai ,  Shinji Kawada ,  Seiji Samukawa

发明人： Youichi Yatagai ,  Shinji Kawada ,  Seiji Samukawa

IPC分类号： H01L21/66 ,  H01L21/4763

CPC分类号： H01L22/20 ,  H01L22/14

摘要： A method of measuring a resistivity of a sidewall of a contact hole formed in a semiconductor device, wherein said semiconductor device includes a first electrode formed on a substrate; a second electrode formed on the first electrode with an insulating film in between; a resist pattern formed on the first electrode and the second electrode; a contact hole formed in the first electrode and the second electrode; and an organic film deposited on the sidewall of the contact hole, includes the steps of: placing a probe needle on the first electrode and the second electrode so that the probe needle contacts with the first electrode and the second electrode several times; establishing electrical conductivity of the probe needle relative to the first electrode and the second electrode; and measuring the resistivity of the organic film between the first electrode and the second electrode.

摘要翻译： 一种测量形成在半导体器件中的接触孔的侧壁的电阻率的方法，其中所述半导体器件包括形成在衬底上的第一电极; 在第一电极上形成有绝缘膜的第二电极; 形成在所述第一电极和所述第二电极上的抗蚀剂图案; 形成在所述第一电极和所述第二电极中的接触孔; 和沉积在接触孔的侧壁上的有机膜包括以下步骤：将探针放置在第一电极和第二电极上，使得探针与第一电极和第二电极接触数次; 建立探针相对于第一电极和第二电极的导电性; 并测量第一电极和第二电极之间的有机膜的电阻率。

公开(公告)号：US08329591B2

公开(公告)日：2012-12-11

申请号：US12101334

申请日：2008-04-11

申请人： Shinji Kawada

发明人： Shinji Kawada

IPC分类号： H01L21/3065

CPC分类号： H01L21/31116 ,  H01L21/76802 ,  H01L21/76805

摘要： Disclosed is a means for stabilizing quality of a semiconductor device by preventing projections from being formed in the bottom of a through hole. A method of manufacturing a semiconductor device includes a process of forming a through hole reaching a metal nitride layer through an interlayer insulating layer on a semiconductor wafer on which the wiring layer, the metal nitride layer formed on the wiring layer, and the interlayer insulating layer covering the wiring layer and the metal nitride layer are formed. The through hole forming process includes: a first etching step of etching the interlayer insulating layer by an anisotropic etching method with the semiconductor wafer set to a first temperature; and a second etching step of etching an upper surface of metal nitride layer by an anisotropic etching method with the semiconductor wafer set to a second temperature higher than the first temperature.

摘要翻译： 公开了一种通过防止在通孔的底部形成突起来稳定半导体器件的质量的手段。 一种制造半导体器件的方法包括：在半导体晶片上形成通过层间绝缘层到达金属氮化物层的通孔的工艺，其中布线层，形成在布线层上的金属氮化物层和层间绝缘层 覆盖布线层和金属氮化物层。 通孔形成工艺包括：第一蚀刻步骤，通过使半导体晶片设定为第一温度的各向异性蚀刻方法蚀刻层间绝缘层; 以及第二蚀刻步骤，通过各向异性蚀刻方法蚀刻金属氮化物层的上表面，半导体晶片设置为高于第一温度的第二温度。