公开(公告)号：US07790580B2

公开(公告)日：2010-09-07

申请号：US11684447

申请日：2007-03-09

申请人： Hoi Sing Kwok ,  Man Wong ,  Zhiguo Meng ,  Shuyun Zhao ,  Chunya Wu

发明人： Hoi Sing Kwok ,  Man Wong ,  Zhiguo Meng ,  Shuyun Zhao ,  Chunya Wu

IPC分类号： H01L21/20 ,  H01L21/36

CPC分类号： H01L21/02422 ,  H01L21/02532 ,  H01L21/02672 ,  H01L27/1277

摘要： The invention provides a method for forming thin film transistors including a polycrystalline semiconducting film. The method comprises depositing a first layer of amorphous semiconducting thin film on to a substrate; depositing a second layer of thin film on to the first layer of amorphous semiconducting thin film; patterning the second layer of thin film so that the first layer of amorphous semiconducting thin film is exposed at selected locations; exposing the first and second layers of thin film to a nickel containing compound in either a solution or a vapor phase; removing the second layer of thin film; and annealing the first layer of amorphous semiconducting thin film at an elevated temperature so the first layer of amorphous semiconducting thin film converts into a polycrystalline semiconducting thin film.

摘要翻译： 本发明提供一种形成包括多晶半导体膜的薄膜晶体管的方法。 该方法包括将非晶半导体薄膜的第一层沉积到衬底上; 在第一非晶半导体薄膜层上沉积第二层薄膜; 图案化第二层薄膜，使得第一层非晶半导体薄膜在选定的位置曝光; 将溶液或气相中的第一和第二层薄膜暴露于含镍化合物; 去除第二层薄膜; 以及在升高的温度下使所述第一非晶半导体薄膜层退火，使得所述第一非晶半导体薄膜层转变为多晶半导体薄膜。

公开(公告)号：US08338237B2

公开(公告)日：2012-12-25

申请号：US12841316

申请日：2010-07-22

申请人： Hoi Sing Kwok ,  Man Wong ,  Zhiguo Meng ,  Shuyun Zhao ,  Chunya Wu

发明人： Hoi Sing Kwok ,  Man Wong ,  Zhiguo Meng ,  Shuyun Zhao ,  Chunya Wu

IPC分类号： H01L21/8234 ,  H01L33/08

CPC分类号： H01L21/02422 ,  H01L21/02532 ,  H01L21/02672 ,  H01L27/1277

摘要： The invention provides a method for forming thin film transistors including a polycrystalline semiconducting film. The method comprises depositing a first layer of amorphous semiconducting thin film on to a substrate; depositing a second layer of thin film on to the first layer of amorphous semiconducting thin film; patterning the second layer of thin film so that the first layer of amorphous semiconducting thin film is exposed at selected locations; exposing the first and second layers of thin film to a nickel containing compound in either a solution or a vapor phase ; removing the second layer of thin film; and annealing the first layer of amorphous semiconducting thin film at an elevated temperature so the first layer of amorphous semiconducting thin film converts into a polycrystalline semiconducting thin film.

摘要翻译： 本发明提供一种形成包括多晶半导体膜的薄膜晶体管的方法。 该方法包括将非晶半导体薄膜的第一层沉积到衬底上; 在第一非晶半导体薄膜层上沉积第二层薄膜; 图案化第二层薄膜，使得第一层非晶半导体薄膜在选定的位置曝光; 将溶液或气相中的第一和第二层薄膜暴露于含镍化合物; 去除第二层薄膜; 以及在升高的温度下使所述第一非晶半导体薄膜层退火，使得所述第一非晶半导体薄膜层转变为多晶半导体薄膜。

公开(公告)号：US20070212855A1

公开(公告)日：2007-09-13

申请号：US11684447

申请日：2007-03-09

申请人： Hoi Sing Kwok ,  Man Wong ,  Zhiguo Meng ,  Shuyun Zhao ,  Chunya Wu

发明人： Hoi Sing Kwok ,  Man Wong ,  Zhiguo Meng ,  Shuyun Zhao ,  Chunya Wu

IPC分类号： H01L21/20

CPC分类号： H01L21/02422 ,  H01L21/02532 ,  H01L21/02672 ,  H01L27/1277

摘要： The invention provides a method for forming thin film transistors including a polycrystalline semiconducting film. The method comprises depositing a first layer of amorphous semiconducting thin film on to a substrate; depositing a second layer of thin film on to the first layer of amorphous semiconducting thin film; patterning the second layer or thin film so that the first layer of amorphous semiconducting thin film is exposed at selected locations; exposing the first and second layers of thin film to a nickel containing compound in either a solution or a vapor phase; removing the second layer of thin film; and annealing the first layer of amorphous semiconducting thin film at an elevated temperature so the first layer of amorphous semiconducting thin film converts into a polycrystalline semiconducting thin film.

摘要翻译： 本发明提供一种形成包括多晶半导体膜的薄膜晶体管的方法。 该方法包括将非晶半导体薄膜的第一层沉积到衬底上; 在第一非晶半导体薄膜层上沉积第二层薄膜; 图案化第二层或薄膜，使得第一层非晶半导体薄膜在选定的位置曝光; 将溶液或气相中的第一和第二层薄膜暴露于含镍化合物; 去除第二层薄膜; 以及在升高的温度下使所述第一非晶半导体薄膜层退火，使得所述第一非晶半导体薄膜层转变为多晶半导体薄膜。

公开(公告)号：US20110012124A1

公开(公告)日：2011-01-20

申请号：US12841316

申请日：2010-07-22

申请人： Hoi Sing Kwok ,  Man Wong ,  Zhiguo Meng ,  Shuyun Zhao ,  Chunya Wu

发明人： Hoi Sing Kwok ,  Man Wong ,  Zhiguo Meng ,  Shuyun Zhao ,  Chunya Wu

IPC分类号： H01L33/08 ,  H01L21/8234

CPC分类号： H01L21/02422 ,  H01L21/02532 ,  H01L21/02672 ,  H01L27/1277

摘要： The invention provides a method for forming thin film transistors including a polycrystalline semiconducting film. The method comprises depositing a first layer of amorphous semiconducting thin film on to a substrate; depositing a second layer of thin film on to the first layer of amorphous semiconducting thin film; patterning the second layer of thin film so that the first layer of amorphous semiconducting thin film is exposed at selected locations; exposing the first and second layers of thin film to a nickel containing compound in either a solution or a vapor phase ; removing the second layer of thin film; and annealing the first layer of amorphous semiconducting thin film at an elevated temperature so the first layer of amorphous semiconducting thin film converts into a polycrystalline semiconducting thin film.

摘要翻译： 本发明提供一种形成包括多晶半导体膜的薄膜晶体管的方法。 该方法包括将非晶半导体薄膜的第一层沉积到衬底上; 在第一非晶半导体薄膜层上沉积第二层薄膜; 图案化第二层薄膜，使得第一层非晶半导体薄膜在选定的位置曝光; 将溶液或气相中的第一和第二层薄膜暴露于含镍化合物; 去除第二层薄膜; 以及在升高的温度下使所述第一非晶半导体薄膜层退火，使得所述第一非晶半导体薄膜层转变为多晶半导体薄膜。

公开(公告)号：US08426865B2

公开(公告)日：2013-04-23

申请号：US12666220

申请日：2008-02-04

申请人： Hoi Sing Kwok ,  Man Wong ,  Zhiguo Meng ,  Shuyun Zhao

发明人： Hoi Sing Kwok ,  Man Wong ,  Zhiguo Meng ,  Shuyun Zhao

IPC分类号： H01L27/108

CPC分类号： H01L29/78696 ,  H01L27/1281 ,  H01L29/04 ,  H01L29/66757

摘要： A low temperature polycrystalline silicon device and techniques to manufacture thereof with excellent performance. Employing doped poly-Si lines which we called a bridged-grain structure (BG), the intrinsic or lightly doped channel is separated into multiple regions. A single gate covering the entire active channel including the doped lines is still used to control the current flow. Using this BG poly-Si as an active layer and making sure the TFT is designed so that the current flows perpendicularly to the parallel lines of grains, grain boundary effects can be reduced.

摘要翻译： 低温多晶硅器件及其制造技术，性能优良。 使用称为桥接晶粒结构（BG）的掺杂多晶硅线，本征或轻掺杂沟道被分离成多个区域。 覆盖包括掺杂线的整个有源沟道的单个栅极仍然用于控制电流。 使用该BG多晶硅作为有源层，并确保TFT被设计成使得电流垂直于平行的晶粒线流动，可以减小晶界效应。

公开(公告)号：US20100171546A1

公开(公告)日：2010-07-08

申请号：US12666220

申请日：2008-02-04

申请人： Hoi Sing Kwok ,  Man Wong ,  Zhiguo Meng ,  Shuyun Zhao

发明人： Hoi Sing Kwok ,  Man Wong ,  Zhiguo Meng ,  Shuyun Zhao

IPC分类号： G05F3/02 ,  H01L29/786 ,  H01L21/335 ,  H01L29/772

CPC分类号： H01L29/78696 ,  H01L27/1281 ,  H01L29/04 ,  H01L29/66757

摘要： A low temperature polycrystalline silicon device and techniques to manufacture thereof with excellent performance. Employing doped poly-Si lines which we called a bridged-grain structure (BG), the intrinsic or lightly doped channel is separated into multiple regions. A single gate covering the entire active channel including the doped lines is still used to control the current flow. Using this BG poly-Si as an active layer and making sure the TFT is designed so that the current flows perpendicularly to the parallel lines of grains, grain boundary effects can be reduced. Reliability, uniformity and the electrical performance of the BG poly-Si TFT are significantly improved compared with the conventional low temperature poly-Si TFT.

摘要翻译： 低温多晶硅器件及其制造技术，性能优良。 使用称为桥接晶粒结构（BG）的掺杂多晶硅线，本征或轻掺杂沟道被分离成多个区域。 覆盖包括掺杂线的整个有源沟道的单个栅极仍然用于控制电流。 使用该BG多晶硅作为有源层，并确保TFT被设计成使得电流垂直于平行的晶粒线流动，可以减小晶界效应。 与传统的低温多晶硅TFT相比，BG多晶硅TFT的可靠性，均匀性和电性能显着提高。