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公开(公告)号：US20240038188A1
公开(公告)日：2024-02-01
申请号：US18377433
申请日：2023-10-06
发明人： Hung-Yu Lu , Rong-Fong Chen
IPC分类号： G09G3/36
CPC分类号： G09G3/3607 , G09G3/3655 , G09G3/3677 , G09G3/3685 , G09G3/3614 , G09G2310/027 , G09G2320/0247 , G09G2320/0276 , G09G2320/0673
摘要： The present invention relates to a driving method for flicker suppression of a display panel and a driving circuit thereof. The driving circuit includes a source driving circuit and a common voltage generating circuit. The driving method includes driving the source driving circuit to generate at least one first source signal and at least one second source signal, the first source signal corresponds to at least one first pixel on a first scanning line; the second source signal corresponds to at least one second pixel on a second scanning line. The common voltage generating circuit generates at least one common voltage. While driving the first pixel and the second pixel to display the same gray scale image, the first source signal is not equal to the second source signal, or a first common voltage and a second common voltage generated by the common voltage generating circuit are different.
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公开(公告)号：US10984748B2
公开(公告)日：2021-04-20
申请号：US15138434
申请日：2016-04-26
发明人： Hung-Yu Lu
IPC分类号： G09G3/36
摘要： This disclosure provides a gate driving circuit, which comprises: first P-channel, second P-channel, first N-channel and second N-channel transistors, each has a gate, a source, a drain, and a base connected to the source; an output terminal electrically connected to the drains of the second N-channel and P-channel transistors; wherein the source of the first P-channel transistor is connected to a first voltage source, and a first voltage is applied to its gate; the source of the first N-channel transistor is connected to a second voltage source, and a second voltage is applied to its gate; the source of the second P-channel transistor is connected to the drain of the first P-channel transistor, and a third voltage is applied to its gate; the source of the second N-channel transistor is connected to the drain of the first N-channel transistor, and a control voltage is applied to its gate.
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公开(公告)号：US20170285862A1
公开(公告)日：2017-10-05
申请号：US15174044
申请日：2016-06-06
发明人： YAO-SHENG HU , Chun-Kuan Wu , Ching-Jen Tung , Hung-Yen Tai
CPC分类号： G06F3/0418 , G05F3/08 , G06F3/044 , G06F3/045 , H03K17/16
摘要： This disclosure provides a noise suppression circuit for suppressing a noise in a voltage signal. The noise suppression circuit comprises: a switch unit having a first terminal receiving the voltage signal and a second terminal; a capacitor having a first terminal connected to the first terminal of the switch unit and a second terminal grounded; and an analog front-end unit including an operational amplifier with a signal input terminal and a reference-voltage input terminal electrically connected to the second terminal of the switch unit; wherein the switch unit is controlled by a pulse signal.
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公开(公告)号：US20240284063A1
公开(公告)日：2024-08-22
申请号：US18582707
申请日：2024-02-21
发明人： Chen-Yuan Yang , Tsun-Sen Lin , Hung-Yen Tai , Ming-Lung Hsu
IPC分类号： H04N25/616
CPC分类号： H04N25/616
摘要： The present invention provides a sensor circuit with noise elimination comprising: a reference circuit which receives plural first sensing signals and generates a ramp signal based on the first sensing signal; and a comparison circuit which is coupled to the reference circuit, and which receives a second sensing signal and a ramp signal and generates a count signal based on the ramp signal and the second sensing signal and records the count signal at the time when the ramp signal is equal to the second sensing signal, thereby eliminating the noise of the second sensing signal to obtain a noise-free sensing value. The count signal is recorded when the ramp signal and the second sense signal are equal, so that the noise of the second sense signal is eliminated and a noise-free sense value is obtained.
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公开(公告)号：US12112717B2
公开(公告)日：2024-10-08
申请号：US18377433
申请日：2023-10-06
发明人： Hung-Yu Lu , Rong-Fong Chen
IPC分类号： G09G3/36
CPC分类号： G09G3/3607 , G09G3/3655 , G09G3/3677 , G09G3/3685 , G09G3/3614 , G09G2310/027 , G09G2320/0247 , G09G2320/0276 , G09G2320/0673
摘要： The present invention relates to a driving method for flicker suppression of a display panel and a driving circuit thereof. The driving circuit includes a source driving circuit and a common voltage generating circuit. The driving method includes driving the source driving circuit to generate at least one first source signal and at least one second source signal, the first source signal corresponds to at least one first pixel on a first scanning line; the second source signal corresponds to at least one second pixel on a second scanning line. The common voltage generating circuit generates at least one common voltage. While driving the first pixel and the second pixel to display the same gray scale image, the first source signal is not equal to the second source signal, or a first common voltage and a second common voltage generated by the common voltage generating circuit are different.
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公开(公告)号：US20180158433A1
公开(公告)日：2018-06-07
申请号：US15833146
申请日：2017-12-06
IPC分类号： G09G3/36
CPC分类号： G09G3/3696 , G09G3/20 , G09G3/3674 , G09G3/3685 , G09G2310/027 , G09G2310/08 , G09G2320/0247 , G09G2320/0285 , G09G2320/10 , G09G2330/12 , G09G2340/10 , G09G2340/125 , G09G2380/10
摘要： A display system is provided, which may include a processor, a controller, a video combiner and a display panel. The controller can receive a first input signal and a second input signal from the processor, and can generate a first video data, a second video data and a plurality of timing signals according to the first input signal and the second input signal. The video combiner can combine the first video data and the second video data to generate a combined video data. The display panel can display the combined video data according to the timing signals.
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公开(公告)号：US20170365232A1
公开(公告)日：2017-12-21
申请号：US15400128
申请日：2017-01-06
发明人： CHIH-WEI CHANG , SHIH-WEI PENG
IPC分类号： G09G5/00
CPC分类号： G09G5/008 , B60Y2400/92 , G09G5/12 , G09G5/18 , G09G2310/0297 , G09G2320/0233 , G09G2330/08 , G09G2340/10 , G09G2340/12 , G09G2370/045 , G09G2380/10
摘要： This disclosure provides a display system, which comprises: a mainframe; a control module comprising an image processing unit and an image compositing unit, communicating with the mainframe through a first channel and a second channel, and generating an image signal; and a display panel showing pictures according to the image signal; wherein the mainframe provides the image processing unit with image data, parameter data and control signals through both the first and second channels when the first channel works, and the image processing unit processes the image data and the parameter data and generates a first data signal to be the image signal; wherein the mainframe provides the image compositing unit with response data through the second channel when the first channel fails, and the image compositing unit combines the response data and a pre-determined background into a second data signal to be the image signal.
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公开(公告)号：US11320919B2
公开(公告)日：2022-05-03
申请号：US16220132
申请日：2018-12-14
发明人： Hsuan-Yi Shaw
摘要： The present invention discloses a touch and display driver integration circuit, which includes a touch circuit and a display driver circuit. The touch circuit generates a status signal standing for the status of the touch circuit. The display driver circuit is coupled to the touch circuit and transmits at least one signal and/or at least one information to the touch circuit according to the status signal so as to drive the touch circuit.
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公开(公告)号：US10186231B2
公开(公告)日：2019-01-22
申请号：US15400128
申请日：2017-01-06
发明人： Chih-Wei Chang , Shih-Wei Peng
摘要： This disclosure provides a display system, which comprises: a mainframe; a control module comprising an image processing unit and an image compositing unit, communicating with the mainframe through a first channel and a second channel, and generating an image signal; and a display panel showing pictures according to the image signal; wherein the mainframe provides the image processing unit with image data, parameter data and control signals through both the first and second channels when the first channel works, and the image processing unit processes the image data and the parameter data and generates a first data signal to be the image signal; wherein the mainframe provides the image compositing unit with response data through the second channel when the first channel fails, and the image compositing unit combines the response data and a pre-determined background into a second data signal to be the image signal.
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公开(公告)号：US20170221444A1
公开(公告)日：2017-08-03
申请号：US15138434
申请日：2016-04-26
发明人： HUNG-YU LU
IPC分类号： G09G3/36
CPC分类号： G09G3/3696 , G09G3/3677
摘要： This disclosure provides a gate driving circuit, which comprises: first P-channel, second P-channel, first N-channel and second N-channel transistors, each has a gate, a source, a drain, and a base connected to the source; an output terminal electrically connected to the drains of the second N-channel and P-channel transistors; wherein the source of the first P-channel transistor is connected to a first voltage source, and a first voltage is applied to its gate; the source of the first N-channel transistor is connected to a second voltage source, and a second voltage is applied to its gate; the source of the second P-channel transistor is connected to the drain of the first P-channel transistor, and a third voltage is applied to its gate; the source of the second N-channel transistor is connected to the drain of the first N-channel transistor, and a control voltage is applied to its gate.
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