公开(公告)号：US08445964B2

公开(公告)日：2013-05-21

申请号：US13349883

申请日：2012-01-13

Applicant: Rohit Pal ,  Stephan Waidmann

Inventor： Rohit Pal ,  Stephan Waidmann

IPC: H01L21/02

CPC classification number: H01L29/7848 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823864 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/78

Abstract: Semiconductor devices with high-K/metal gates are formed with spacers that are substantially resistant to subsequent etching to remove an overlying spacer, thereby avoiding replacement and increasing manufacturing throughput. Embodiments include forming a high-K/metal gate, having an upper surface and side surfaces, over a substrate, e.g., a SOI substrate, and sequentially forming, on the side surfaces of the high-K/metal gate, a first spacer of a non-oxide material, a second spacer, of a material different from that of the first spacer, and a third spacer, of a material different from that of the second spacer. After formation of source and drain regions, e.g., epitaxially grown silicon-germanium, the third spacer is etched with an etchant, such as hot phosphoric acid, to which the second spacer is substantially resistant, thereby avoiding replacement.

Abstract translation: 具有高K /金属栅极的半导体器件由间隔物形成，其具有基本上抵抗后续蚀刻以去除上覆间隔物，从而避免替换并增加制造生产量。 实施例包括在衬底（例如SOI衬底）上形成具有上表面和侧表面的高K /金属栅极，并且在高K /金属栅极的侧表面上依次形成第一间隔物 不同于第一间隔物的材料的非氧化物材料，第二间隔物和与第二间隔物不同的材料的第三间隔物。 在形成源极和漏极区域，例如外延生长的硅 - 锗之后，用蚀刻剂（例如热磷酸）蚀刻第三间隔物，第二间隔物基本上抵抗其上，从而避免更换。

公开(公告)号：US20130049124A1

公开(公告)日：2013-02-28

申请号：US13223016

申请日：2011-08-31

Applicant: Clemens Fitz ,  Stephan Waidmann ,  Stefan Flachowsky ,  Peter Baars ,  Rainer Giedigkeit

Inventor： Clemens Fitz ,  Stephan Waidmann ,  Stefan Flachowsky ,  Peter Baars ,  Rainer Giedigkeit

IPC: H01L27/088 ,  H01L21/3205

CPC classification number: H01L29/665 ,  H01L21/28518 ,  H01L21/823425 ,  H01L29/1083 ,  H01L29/165 ,  H01L29/6659 ,  H01L29/7848

Abstract: An MOSFET device having a Silicide layer of uniform thickness and which is substantially free of “Spotty” NiSi-type holes, and methods for its fabrication, are provided. One such method involves simultaneously depositing a metal layer (e.g. Ni) over the active and open areas of a semiconductor substrate. The depth to which some or all of the metal is transferred into the substrate is determined by thermal budget. A rapid thermal annealing process is employed to produce a NiSi layer of a uniform thickness in both the active and open areas. Upon achieving a NiSi layer of a desired thickness, the excess metal is removed from the substrate surface.

Abstract translation: 具有均匀厚度并且基本上没有斑点NiSi型孔的硅化物层的MOSFET器件及其制造方法。 一种这样的方法涉及在半导体衬底的有源和开放区域上同时沉积金属层（例如Ni）。 一些或全部金属转移到基底中的深度由热预算确定。 采用快速热退火工艺来在活性和开放区域中制备均匀厚度的NiSi层。 在达到所需厚度的NiSi层时，从衬底表面去除多余的金属。

公开(公告)号：US20120112281A1

公开(公告)日：2012-05-10

申请号：US13349883

申请日：2012-01-13

Applicant: Rohit PAL ,  Stephan Waidmann

Inventor： Rohit PAL ,  Stephan Waidmann

IPC: H01L27/12

CPC classification number: H01L29/7848 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823864 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/78

Abstract: Semiconductor devices with high-K/metal gates are formed with spacers that are substantially resistant to subsequent etching to remove an overlying spacer, thereby avoiding replacement and increasing manufacturing throughput. Embodiments include forming a high-K/metal gate, having an upper surface and side surfaces, over a substrate, e.g., a SOI substrate, and sequentially forming, on the side surfaces of the high-K/metal gate, a first spacer of a non-oxide material, a second spacer, of a material different from that of the first spacer, and a third spacer, of a material different from that of the second spacer. After formation of source and drain regions, e.g., epitaxially grown silicon-germanium, the third spacer is etched with an etchant, such as hot phosphoric acid, to which the second spacer is substantially resistant, thereby avoiding replacement.

Abstract translation: 具有高K /金属栅极的半导体器件由间隔物形成，其具有基本上抵抗后续蚀刻以去除上覆间隔物，从而避免替换并增加制造生产量。 实施例包括在衬底（例如SOI衬底）上形成具有上表面和侧表面的高K /金属栅极，并且在高K /金属栅极的侧表面上依次形成第一间隔物 不同于第一间隔物的材料的非氧化物材料，第二间隔物和与第二间隔物不同的材料的第三间隔物。 在形成源极和漏极区域，例如外延生长的硅 - 锗之后，用蚀刻剂（例如热磷酸）蚀刻第三间隔物，第二间隔物基本上抵抗其上，从而避免更换。

公开(公告)号：US08119464B2

公开(公告)日：2012-02-21

申请号：US12561638

申请日：2009-09-17

Applicant: Rohit Pal ,  Stephan Waidmann

Inventor： Rohit Pal ,  Stephan Waidmann

IPC: H01L21/84

CPC classification number: H01L29/7848 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823864 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/78

Abstract: Semiconductor devices with high-K/metal gates are formed with spacers that are substantially resistant to subsequent etching to remove an overlying spacer, thereby avoiding replacement and increasing manufacturing throughput. Embodiments include forming a high-K/metal gate, having an upper surface and side surfaces, over a substrate, e.g., a SOI substrate, and sequentially forming, on the side surfaces of the high-K/metal gate, a first spacer of a non-oxide material, a second spacer, of a material different from that of the first spacer, and a third spacer, of a material different from that of the second spacer. After formation of source and drain regions, e.g., epitaxially grown silicon-germanium, the third spacer is etched with an etchant, such as hot phosphoric acid, to which the second spacer is substantially resistant, thereby avoiding replacement.

Abstract translation: 具有高K /金属栅极的半导体器件由间隔物形成，其具有基本上抵抗后续蚀刻以去除上覆间隔物，从而避免替换并增加制造生产量。 实施例包括在衬底（例如SOI衬底）上形成具有上表面和侧表面的高K /金属栅极，并且在高K /金属栅极的侧表面上依次形成第一间隔物 不同于第一间隔物的材料的非氧化物材料，第二间隔物和与第二间隔物不同的材料的第三间隔物。 在形成源极和漏极区域，例如外延生长的硅 - 锗之后，用蚀刻剂（例如热磷酸）蚀刻第三间隔物，第二间隔物基本上抵抗其上，从而避免更换。

公开(公告)号：US20110062519A1

公开(公告)日：2011-03-17

申请号：US12561638

申请日：2009-09-17

Applicant: Rohit Pal ,  Stephan Waidmann

Inventor： Rohit Pal ,  Stephan Waidmann

IPC: H01L29/78 ,  H01L21/762

CPC classification number: H01L29/7848 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823864 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/78

Abstract: Semiconductor devices with high-K/metal gates are formed with spacers that are substantially resistant to subsequent etching to remove an overlying spacer, thereby avoiding replacement and increasing manufacturing throughput. Embodiments include forming a high-K/metal gate, having an upper surface and side surfaces, over a substrate, e.g., a SOI substrate, and sequentially forming, on the side surfaces of the high-K/metal gate, a first spacer of a non-oxide material, a second spacer, of a material different from that of the first spacer, and a third spacer, of a material different from that of the second spacer. After formation of source and drain regions, e.g., epitaxially grown silicon-germanium, the third spacer is etched with an etchant, such as hot phosphoric acid, to which the second spacer is substantially resistant, thereby avoiding replacement.

Abstract translation: 具有高K /金属栅极的半导体器件由间隔物形成，其具有基本上抵抗后续蚀刻以去除上覆间隔物，从而避免替换并增加制造生产量。 实施例包括在衬底（例如SOI衬底）上形成具有上表面和侧表面的高K /金属栅极，并且在高K /金属栅极的侧表面上依次形成第一间隔物 不同于第一间隔物的材料的非氧化物材料，第二间隔物和与第二间隔物不同的材料的第三间隔物。 在形成源极和漏极区域，例如外延生长的硅 - 锗之后，用蚀刻剂（例如热磷酸）蚀刻第三间隔物，第二间隔物基本上抵抗其上，从而避免更换。

公开(公告)号：US20140028529A1

公开(公告)日：2014-01-30

申请号：US13557648

申请日：2012-07-25

Applicant: Stephan Waidmann ,  Elmar Guha

Inventor： Stephan Waidmann ,  Elmar Guha

IPC: H01Q1/50

CPC classification number: H01Q1/246 ,  H01Q1/243 ,  H04B1/03 ,  H04B1/08 ,  H04B1/38

Abstract: Antenna systems, such as an active antenna system (AAS), can include active and passive electronic components located closely together inside an antenna system. Such systems may benefit from variable adaptation of active antenna system radio frequency signal filtering. An apparatus can include an active part on a first end of a signal path within a sealed enclosure. The apparatus can also include a radiator part on a second end of the signal path within the sealed enclosure. The apparatus can further include an intermediate part, which includes at least one of an additional filter part or a customized passive part, positioned between the active part and the radiator part along the signal path between the first signal side and the second signal side.

Abstract translation: 诸如有源天线系统（AAS）的天线系统可以包括位于天线系统内的紧密结合在一起的有源和无源电子部件。 这样的系统可以受益于有源天线系统射频信号滤波的可变适应。 装置可以包括位于密封外壳内的信号路径的第一端上的有源部分。 该装置还可以包括在密封外壳内的信号路径的第二端上的散热器部分。 该装置还可以包括中间部分，其包括沿第一信号侧和第二信号侧之间的信号路径位于有源部分和辐射器部分之间的附加滤波器部分或定制的无源部分中的至少一个。

公开(公告)号：US20110266638A1

公开(公告)日：2011-11-03

申请号：US12964020

申请日：2010-12-09

Applicant: Kai Frohberg ,  Rainer Giedigkeit ,  Robert Binder ,  Stephan Waidmann

Inventor： Kai Frohberg ,  Rainer Giedigkeit ,  Robert Binder ,  Stephan Waidmann

IPC: H01L29/423 ,  H01L21/28

CPC classification number: H01L21/28518 ,  H01L29/6656 ,  H01L29/7833

Abstract: A metal silicide in sophisticated semiconductor devices may be provided in a late manufacturing stage on the basis of contact openings, wherein the deposition of the contact material, such as tungsten, may be efficiently combined with the silicidation process. In this case, the thermally activated deposition process may initiate the formation of a metal silicide in highly doped semiconductor regions.

Abstract translation: 复杂半导体器件中的金属硅化物可以基于接触开口在后期制造阶段中提供，其中诸如钨的接触材料的沉积可以有效地与硅化工艺组合。 在这种情况下，热激活沉积工艺可以在高度掺杂的半导体区域中开始形成金属硅化物。

公开(公告)号：US08922453B2

公开(公告)日：2014-12-30

申请号：US13557648

申请日：2012-07-25

Applicant: Stephan Waidmann ,  Elmar Guha

Inventor： Stephan Waidmann ,  Elmar Guha

IPC: H01Q1/24

CPC classification number: H01Q1/246 ,  H01Q1/243 ,  H04B1/03 ,  H04B1/08 ,  H04B1/38

Abstract: Antenna systems, such as an active antenna system (AAS), can include active and passive electronic components located closely together inside an antenna system. Such systems may benefit from variable adaptation of active antenna system radio frequency signal filtering. An apparatus can include an active part on a first end of a signal path within a sealed enclosure. The apparatus can also include a radiator part on a second end of the signal path within the sealed enclosure. The apparatus can further include an intermediate part, which includes at least one of an additional filter part or a customized passive part, positioned between the active part and the radiator part along the signal path between the first signal side and the second signal side.

Abstract translation: 诸如有源天线系统（AAS）的天线系统可以包括位于天线系统内的紧密结合在一起的有源和无源电子部件。 这样的系统可以受益于有源天线系统射频信号滤波的可变适应。 装置可以包括位于密封外壳内的信号路径的第一端上的有源部分。 该装置还可以包括在密封外壳内的信号路径的第二端上的散热器部分。 该装置还可以包括中间部分，其包括沿第一信号侧和第二信号侧之间的信号路径位于有源部分和辐射器部分之间的附加滤波器部分或定制的无源部分中的至少一个。