公开(公告)号：US20090001472A1

公开(公告)日：2009-01-01

申请号：US11771565

申请日：2007-06-29

Applicant: Akram Salman ,  Stephen Beebe

Inventor： Akram Salman ,  Stephen Beebe

IPC: H01L23/62 ,  H01L21/336

CPC classification number: H01L27/0255

Abstract: A method for fabricating a semiconductor device is provided. According to this method, a first gate electrode and a second gate electrode are formed overlying a first portion of a silicon substrate, and ions of a first conductivity-type are implanted into a second portion of the silicon substrate to define a first conductivity-type diode region within the silicon substrate. Ions of a second conductivity-type are implanted into a third portion of the silicon substrate to define a second conductivity-type diode region within the silicon substrate. During one of the steps of implanting ions of the first conductivity-type and implanting ions of the second conductivity-type, ions are also implanted into at least part of the first portion to define a separation region within the first portion. The separation region splits the first portion into a first well device region and a second well device region. The separation region is formed in series between the first well device region and the second well device region.

Abstract translation: 提供一种制造半导体器件的方法。 根据该方法，在硅衬底的第一部分上形成第一栅电极和第二栅极，将第一导电类型的离子注入到硅衬底的第二部分中以限定第一导电型 硅衬底内的二极管区域。 将第二导电类型的离子注入到硅衬底的第三部分中以在硅衬底内限定第二导电型二极管区。 在植入第二导电类型的第一导电类型的离子和注入第二导电类型的离子的步骤之一中，离子也被注入到第一部分的至少一部分中以在第一部分内限定分离区域。 分离区域将第一部分分成第一阱器件区域和第二阱器件区域。 分离区域在第一阱器件区域和第二阱器件区域之间串联形成。

公开(公告)号：US08000813B2

公开(公告)日：2011-08-16

申请号：US12089973

申请日：2006-08-21

Applicant: Karl H. Schoenbach ,  Stephen Beebe

Inventor： Karl H. Schoenbach ,  Stephen Beebe

IPC: A61N1/00

CPC classification number: A61N1/40 ,  A61N1/37229

Abstract: Method and apparatus for cellular and intracellular manipulation of cell functions with ultrashort electrical pulses and for targeted delivery of the electrical pulses into cell cultures, patients, and tissues.

Abstract translation: 利用超短电脉冲对细胞功能进行细胞和细胞内操作的方法和装置，并将电脉冲靶向递送到细胞培养物，患者和组织中。

公开(公告)号：US07791102B2

公开(公告)日：2010-09-07

申请号：US11549923

申请日：2006-10-16

Applicant: Akram Salman ,  Stephen Beebe

Inventor： Akram Salman ,  Stephen Beebe

IPC: H01L27/07

CPC classification number: H01L27/0262 ,  H01L29/7436

Abstract: Methods and devices are provided for protecting semiconductor devices against electrostatic discharge events. An electrostatic discharge protection device comprises a silicon substrate, a P+-type anode region disposed within the silicon substrate, and an N-well device region disposed within the silicon substrate in series with the P+-type anode region. A first P-well device region is disposed within the silicon substrate in series with the first N-well device region and an N+-type cathode region is disposed within the silicon substrate. A gate electrode is disposed at least substantially overlying the first N-well and P-well device regions of the silicon substrate.

Abstract translation: 提供了用于保护半导体器件免受静电放电事件的方法和装置。 静电放电保护装置包括硅衬底，设置在硅衬底内的P +型阳极区域和与P +型阳极区域串联设置在硅衬底内的N阱器件区域。 第一P阱器件区域与第一N阱器件区域串联设置在硅衬底内，并且N +型阴极区域设置在硅衬底内。 栅电极至少基本上覆盖在硅衬底的第一N阱和P阱器件区域上。

公开(公告)号：US20080087962A1

公开(公告)日：2008-04-17

申请号：US11549923

申请日：2006-10-16

Applicant: Akram Salman ,  Stephen Beebe

Inventor： Akram Salman ,  Stephen Beebe

IPC: H01L23/62 ,  H01L21/8238

CPC classification number: H01L27/0262 ,  H01L29/7436

Abstract: Methods and devices are provided for protecting semiconductor devices against electrostatic discharge events. An electrostatic discharge protection device comprises a silicon substrate, a P+-type anode region disposed within the silicon substrate, and an N-well device region disposed within the silicon substrate in series with the P+-type anode region. A first P-well device region is disposed within the silicon substrate in series with the first N-well device region and an N+-type cathode region is disposed within the silicon substrate. A gate electrode is disposed at least substantially overlying the first N-well and P-well device regions of the silicon substrate.

Abstract translation: 提供了用于保护半导体器件免受静电放电事件的方法和装置。 静电放电保护器件包括设置在硅衬底内的硅衬底，P + +型阳极区域和设置在硅衬底内的N阱器件区域，该N阱器件区域与P < +阳极区域。 第一P阱器件区域设置在与第一N阱器件区域串联的硅衬底内，并且N + +型阴极区域设置在硅衬底内。 栅电极至少基本上覆盖在硅衬底的第一N阱和P阱器件区域上。

公开(公告)号：US20060269531A1

公开(公告)日：2006-11-30

申请号：US10564994

申请日：2004-07-19

Applicant: Stephen Beebe ,  Karl Schoenbach

Inventor： Stephen Beebe ,  Karl Schoenbach

IPC: A61K48/00 ,  A61K39/395 ,  C12N15/87

CPC classification number: A61N1/0412 ,  A61K48/00 ,  A61N1/327 ,  C12M35/02 ,  C12N13/00 ,  C12N15/87

Abstract: A method and apparatus are provided for delivering an agent into a cell through the application of nanosecond pulse electric fields (“nsPEF's”). The method includes circuitry for delivery of an agent into a cell via known methods followed by the application of nanosecond pulse electric fields to said cell in order to facilitate entry of the agent into the nucleus of the cell. In a preferred embodiment, the present invention is directed to a method of enhancing gene expression in a cell comprising the application of nanosecond pulse electric fields to said cell. An apparatus for generating long and short pulses according to the present invention is also provided. The apparatus includes a pulse generator capable of producing a first pulse having a long duration and low voltage amplitude and a second pulse having a short duration and high voltage amplitude.

Abstract translation: 提供了一种方法和装置，用于通过施加纳秒脉冲电场（“nsPEF”）将试剂输送到电池中。 该方法包括用于通过已知方法将试剂递送到细胞中的电路，随后将纳秒脉冲电场施加到所述细胞，以便促进试剂进入细胞核。 在优选的实施方案中，本发明涉及增强细胞中基因表达的方法，其包括向所述细胞施加纳秒脉冲电场。 还提供了根据本发明的用于产生长脉冲和短脉冲的装置。 该装置包括能够产生具有长持续时间和低电压振幅的第一脉冲和具有短持续时间和高电压振幅的第二脉冲的脉冲发生器。

公开(公告)号：US20090125091A1

公开(公告)日：2009-05-14

申请号：US12089973

申请日：2006-08-21

Applicant: Karl H. Schoenbach ,  Stephen Beebe

Inventor： Karl H. Schoenbach ,  Stephen Beebe

IPC: A61N5/00 ,  A61N1/00

CPC classification number: A61N1/40 ,  A61N1/37229

Abstract: Method and apparatus for cellular and intracellular manipulation of cell functions with ultrashort electrical pulses and for targeted delivery of the electrical pulses into cell cultures, patients, and tissues.

Abstract translation: 利用超短电脉冲对细胞功能进行细胞和细胞内操作的方法和装置，并将电脉冲靶向递送到细胞培养物，患者和组织中。

公开(公告)号：US20060161221A1

公开(公告)日：2006-07-20

申请号：US11305121

申请日：2005-12-19

Applicant: Peter Blackmore ,  Stephen Beebe ,  E. Buescher ,  Karl Schoenbach

Inventor： Peter Blackmore ,  Stephen Beebe ,  E. Buescher ,  Karl Schoenbach

IPC: A61N1/32

CPC classification number: A61N1/0412 ,  A61N1/0424 ,  A61N1/325

Abstract: Methods for inducing calcium mobilization in cells through the application of nanosecond pulsed electric fields (“nsPEFs”) are provided. The invention also provides a method of increasing intracellular calcium in cells through the application of nsPEFs. In one embodiment of the invention, the cells are human platelets, whereby activation and aggregation of the platelets is induced. Methods for treating an injury, trauma, or loss of blood in a subject, through the application of nsPEFs are also provided.

Abstract translation: 提供通过施加纳秒脉冲电场（“nsPEF”）在细胞中诱导钙动员的方法。 本发明还提供了通过应用nsPEF增加细胞内细胞内钙的方法。 在本发明的一个实施方案中，细胞是人血小板，由此诱导血小板的活化和聚集。 还提供了通过应用nsPEF来治疗受试者的损伤，创伤或丧失血液的方法。

公开(公告)号：US08564917B2

公开(公告)日：2013-10-22

申请号：US13151898

申请日：2011-06-02

Applicant: Wensong Chen ,  Stephen Beebe

Inventor： Wensong Chen ,  Stephen Beebe

IPC: H02H9/00

CPC classification number: H02H9/046

Abstract: Apparatus are provided for integrated circuits that include circuitry to provide protection from electrostatic discharge. An exemplary integrated circuit includes an input/output terminal, a first transistor coupled to the input/output terminal, a second transistor coupled to a control terminal of the first transistor and a reference voltage node, and detection circuitry coupled to a control terminal of the second transistor. The detection circuitry is configured to turn on the second transistor in response to a discharge event to protect the first transistor.

Abstract translation: 提供了用于集成电路的装置，其包括用于提供防止静电放电的电路的集成电路。 示例性的集成电路包括输入/​​输出端子，耦合到输入/输出端子的第一晶体管，耦合到第一晶体管的控制端和第二晶体管的参考电压节点的第二晶体管以及耦合到第一晶体管的控制端的检测电路 第二晶体管。 检测电路被配置为响应于放电事件接通第二晶体管以保护第一晶体管。

公开(公告)号：US20120307405A1

公开(公告)日：2012-12-06

申请号：US13151898

申请日：2011-06-02

Applicant: Wensong CHEN ,  Stephen BEEBE

Inventor： Wensong CHEN ,  Stephen BEEBE

IPC: H02H9/04

CPC classification number: H02H9/046

Abstract: Apparatus are provided for integrated circuits that include circuitry to provide protection from electrostatic discharge. An exemplary integrated circuit includes an input/output terminal, a first transistor coupled to the input/output terminal, a second transistor coupled to a control terminal of the first transistor and a reference voltage node, and detection circuitry coupled to a control terminal of the second transistor. The detection circuitry is configured to turn on the second transistor in response to a discharge event to protect the first transistor.

Abstract translation: 提供了用于集成电路的装置，其包括用于提供防止静电放电的电路的集成电路。 示例性的集成电路包括输入/​​输出端子，耦合到输入/输出端子的第一晶体管，耦合到第一晶体管的控制端和第二晶体管的参考电压节点的第二晶体管以及耦合到第一晶体管的控制端的检测电路 第二晶体管。 检测电路被配置为响应于放电事件接通第二晶体管以保护第一晶体管。

公开(公告)号：US08013393B2

公开(公告)日：2011-09-06

申请号：US11771565

申请日：2007-06-29

Applicant: Akram Salman ,  Stephen Beebe

Inventor： Akram Salman ,  Stephen Beebe

IPC: H01L23/62

CPC classification number: H01L27/0255

Abstract: A method for fabricating a semiconductor device is provided. According to this method, a first gate electrode and a second gate electrode are formed overlying a first portion of a silicon substrate, and ions of a first conductivity-type are implanted into a second portion of the silicon substrate to define a first conductivity-type diode region within the silicon substrate. Ions of a second conductivity-type are implanted into a third portion of the silicon substrate to define a second conductivity-type diode region within the silicon substrate. During one of the steps of implanting ions of the first conductivity-type and implanting ions of the second conductivity-type, ions are also implanted into at least part of the first portion to define a separation region within the first portion. The separation region splits the first portion into a first well device region and a second well device region. The separation region is formed in series between the first well device region and the second well device region.

Abstract translation: 提供一种制造半导体器件的方法。 根据该方法，在硅衬底的第一部分上形成第一栅电极和第二栅极，将第一导电类型的离子注入到硅衬底的第二部分中以限定第一导电型 硅衬底内的二极管区域。 将第二导电类型的离子注入到硅衬底的第三部分中以在硅衬底内限定第二导电型二极管区。 在植入第二导电类型的第一导电类型的离子和注入第二导电类型的离子的步骤之一中，离子也被注入到第一部分的至少一部分中以在第一部分内限定分离区域。 分离区域将第一部分分成第一阱器件区域和第二阱器件区域。 分离区域在第一阱器件区域和第二阱器件区域之间串联形成。