公开(公告)号：US06530047B1

公开(公告)日：2003-03-04

申请号：US09411815

申请日：1999-10-01

Applicant: David Alan Edwards ,  Stephen James Wright ,  Bernard Ramanadin

Inventor： David Alan Edwards ,  Stephen James Wright ,  Bernard Ramanadin

IPC: G01R3128

CPC classification number: G01R31/31903

Abstract: A system and method for communicating with an integrated circuit is provided that allows an integrated circuit to communicate debugging information and system bus transaction information with an external system. The system may include an interface protocol that provides flow control between the integrated circuit and the external system. The system may include a high-speed link and/or a JTAG link for communicating information. A link may be automatically selected by a debug circuit, or selected by an on-chip device or external system. The high-speed link enables real-time collection of trace information. Links may be memory-mapped, such that on-chip devices and other devices attached to the system bus may access the external system. The high-speed link may also operate at a rate which is integrally coupled with a rate of the processor or system bus. Further, the high-speed link may be adapted to change speeds in response to a change in operating speed of the system bus or processor. The JTAG interface may utilize standard JTAG components and instructions such that external devices such as debug adaptors adopting these components and instructions may be re-used for different integrated circuit types. Information transmitted over the JTAG or high-speed link may be compressed to optimize available bandwidth of the links. Also, processor control signals can be transferred through links that allow an external system to manipulate and monitor operation of the processor and its associated modules.

公开(公告)号：US06779145B1

公开(公告)日：2004-08-17

申请号：US09410860

申请日：1999-10-01

Applicant: David A. Edwards ,  Stephen James Wright ,  Bernard Ramanadin

Inventor： David A. Edwards ,  Stephen James Wright ,  Bernard Ramanadin

IPC: G01R3128

CPC classification number: G06F11/3636 ,  G06F11/3656

Abstract: A system and method for communicating with an integrated circuit is provided that allows an integrated circuit to communicate debugging information and system bus transaction information with an external system. The system may include an interface protocol that provides flow control between the integrated circuit and the external system. The system may include a high-speed link and/or a JTAG link for communicating information. A link may be automatically selected by a debug circuit, or selected by an on-chip device or external system. The high-speed link enables real-time collection of trace information. Links may be memory-mapped, such that on-chip devices and other devices attached to the system bus may access the external system. The high-speed link may also operate at a rate which is integrally coupled with a rate of the processor or system bus. Further, the high-speed link may be adapted to change speeds in response to a change in operating speed of the system bus or processor. The JTAG interface may utilize standard JTAG components and instructions such that external devices such as debug adaptors adopting these components and instructions may be re-used for different integrated circuit types. Information transmitted over the JTAG-or high-speed link may be compressed to optimize available bandwidth of the links. Also, processor control signals can be transferred through links that allow an external system to manipulate and monitor operation of the processor and its associated modules.

Abstract translation: 提供了一种用于与集成电路通信的系统和方法，其允许集成电路与外部系统通信调试信息和系统总线事务信息。 该系统可以包括在集成电路和外部系统之间提供流量控制的接口协议。 该系统可以包括用于传送信息的高速链路和/或JTAG链路。 链路可以由调试电路自动选择，或由片上设备或外部系统选择。 高速链路可实时追踪跟踪信息。 链路可以是存储器映射的，使得连接到系统总线的片上设备和其他设备可以访问外部系统。 高速链路也可以以与处理器或系统总线的速率整体耦合的速率工作。 此外，高速链路可以适应于响应于系统总线或处理器的操作速度的变化来改变速度。 JTAG接口可以使用标准的JTAG组件和指令，使得诸如使用这些组件和指令的调试适配器的外部设备可以被重新用于不同的集成电路类型。 通过JTAG或高速链路发送的信息可以被压缩以优化链路的可用带宽。 此外，处理器控制信号可以通过允许外部系统操纵和监视处理器及其相关模块的操作的链路传送。

公开(公告)号：US06665816B1

公开(公告)日：2003-12-16

申请号：US09411614

申请日：1999-10-01

Applicant: David Alan Edwards ,  Stephen James Wright

Inventor： David Alan Edwards ,  Stephen James Wright

IPC: G01R3128

CPC classification number: G11C29/32 ,  G01R31/318533 ,  G06F11/3656 ,  G11C29/003

Abstract: A system and method for communicating with an integrated circuit is provided that allows an integrated circuit to communicate debugging information and system bus transaction information with an external system. The system may include an interface protocol that provides flow control between the integrated circuit and the external system. The system may include a high-speed link and/or a JTAG link for communicating information. A link may be automatically selected by a debug circuit, or selected by an on-chip device or external system. The high-speed link enables real-time collection of trace information. Links may be memory-mapped, such that on-chip devices and other devices attached to the system bus may access the external system. The high-speed link may also operate at a rate which is integrally coupled with a rate of the processor or system bus. Further, the high-speed link may be adapted to change speeds in response to a change in operating speed of the system bus or processor. The JTAG interface may utilize standard JTAG components and instructions such that external devices such as debug adaptors adopting these components and instructions may be re-used for different integrated circuit types. Information transmitted over the JTAG or high-speed link may be compressed to optimize available bandwidth of the links. Also, processor control signals can be transferred through links that allow an external system to manipulate and monitor operation of the processor and its associated modules.

Abstract translation: 提供了一种与集成电路通信的系统和方法，其允许集成电路与外部系统通信调试信息和系统总线事务信息。 该系统可以包括在集成电路和外部系统之间提供流量控制的接口协议。 该系统可以包括用于传送信息的高速链路和/或JTAG链路。 链路可以由调试电路自动选择，或由片上设备或外部系统选择。 高速链路可实时追踪跟踪信息。 链路可以是存储器映射的，使得连接到系统总线的片上设备和其他设备可以访问外部系统。 高速链路也可以以与处理器或系统总线的速率整体耦合的速率工作。 此外，高速链路可以适应于响应于系统总线或处理器的操作速度的变化来改变速度。 JTAG接口可以使用标准的JTAG组件和指令，使得诸如使用这些组件和指令的调试适配器的外部设备可以被重新用于不同的集成电路类型。 通过JTAG或高速链路传输的信息可以被压缩以优化链路的可用带宽。 此外，处理器控制信号可以通过允许外部系统操纵和监视处理器及其相关模块的操作的链路传送。