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1.发明授权Tunable optical waveguide filters with optimized lengths and method of designing same 失效具有优化长度的可调谐光波导滤波器及其设计方法公开(公告)号：US06853756B2
公开(公告)日：2005-02-08
申请号：US10105636
申请日：2002-03-25
CPC分类号： G02F1/225 , G02B6/12007 , G02B2006/12109 , G02B2006/12159 , G02B2006/12164 , G02F2201/16 , G02F2203/055
摘要： A generalized tunable optical filter with interconnected processing devices, such as unequal arm Mach-Zehnder interferometric devices and ring resonator devices, is described. Each of the processing elements is characterized by a parametric length Δlk=nkΔlf where nk is an integer greater than 30 and Δlf is the longest length common to all of the processing elements. The optical filter is tuned by the setting of actuators in the processing elements with each setting corresponding to a predetermined filter response, such as for chromatic dispersion compensation and WDM add/drop multiplexer applications. To determine the design variables of the optical filter, such as the coupling angles θ and parametric lengths Δlk for the processing elements, a methodology of determining these variables from the desired application is also described.
摘要翻译： 描述了具有互连处理装置的通用可调谐滤光器，例如不等臂马赫 - 曾德干涉仪和环形谐振器装置。 每个处理元件的特征在于参数长度Deltalk = nkDeltalf，其中nk是大于30的整数，Deltalf是所有处理元件共有的最长长度。 通过处理元件中的致动器的设置来调整滤光器，每个设置对应于预定的滤波器响应，例如用于色散补偿和WDM分插复用器应用。 为了确定光学滤波器的设计变量，例如耦合角度θ和处理元件的参数长度Deltalk，还描述了从所需应用中确定这些变量的方法。
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公开(公告)号：US06269277B1
公开(公告)日：2001-07-31
申请号：US09123129
申请日：1998-07-27
IPC分类号： G06F1900
CPC分类号： G06F17/5063
摘要： A system for designing and optimizing integrated circuits. Design objectives and constraints are described as posynomial functions of the design parameters. The circuit design problem is then expressed as a special form of optimization problem called geometric programming, to which very efficient global optimization methods are applied. The present invention can thereby efficiently determine globally optimal circuit designs, or globally optimal trade-offs among competing performance measures such as, for example for an operational amplifier (op-amp), power, open-loop gain, and bandwidth. The present invention therefore yields automated synthesis of globally optimal circuit designs for a given circuit topology library, directly from specifications.
摘要翻译： 集成电路设计和优化系统。 设计目标和约束被描述为设计参数的函数式函数。 然后将电路设计问题表示为称为几何规划的特殊形式的优化问题，其中应用了非常有效的全局优化方法。 因此，本发明可以有效地确定全球最佳电路设计，或者在诸如运算放大器（运算放大器），功率，开环增益和带宽等竞争性能测量之间的全局最佳权衡。 因此，本发明可以直接从规范产生给定电路拓扑库的全局最佳电路设计的自动合成。
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公开(公告)号：US06311145B1
公开(公告)日：2001-10-30
申请号：US09335227
申请日：1999-06-17
IPC分类号： G06F1750
CPC分类号： G06F17/5063
摘要： A method for the design and optimization of inductors for RF circuits. This method consists in the formulation of RF circuit designs as geometric programs. The designer can specify a wide variety of specifications such as gain, bandwidth, noise, etc. The method, which was implemented in simple code, determines inductor dimensions and component values in a few seconds real-time. The results was also a globally optimal design.
摘要翻译： 一种用于RF电路的电感器的设计和优化的方法。 这种方法包括将RF电路设计作为几何程序。 设计人员可以指定各种规格，如增益，带宽，噪声等。以简单代码实现的方法可以在几秒钟内实时确定电感尺寸和元件值。 结果也是全球最佳设计。
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公开(公告)号：US07650263B2
公开(公告)日：2010-01-19
申请号：US11527897
申请日：2006-09-26
CPC分类号： G06F17/50 , B25J9/1612 , G05B2219/39505 , G06F2217/08 , G06F2217/16
摘要： A method for rapidly determining feasibility of a force optimization problem and for rapidly solving a feasible force optimization problem is disclosed. The method comprises formulating the force optimization problem or force feasibility problem as a convex optimization problem, formulating a primal barrier subproblem associated with the convex optimization problem, and solving the primal barrier subproblem. The method and related methods may also be used to solve each problem in a set of force optimization problems, determine the minimum or maximum force required to satisfy any of a set of force optimization problems, solve a force closure problem, compute a conservative contact force vector, or solve a feasible force optimization problem with bidirectional forces.
摘要翻译： 公开了一种用于快速确定力优化问题的可行性并快速解决可行的力优化问题的方法。 该方法包括将力优化问题或力可行性问题作为凸优化问题，制定与凸优化问题相关的原始障碍子问题，解决原始障碍子问题。 该方法和相关方法也可用于解决一组力优化问题中的每个问题，确定满足一组力优化问题中的任一者所需的最小或最大力，解决力闭合问题，计算保守接触力 或者用双向力解决可行的力优化问题。
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公开(公告)号：US20080077361A1
公开(公告)日：2008-03-27
申请号：US11527897
申请日：2006-09-26
CPC分类号： G06F17/50 , B25J9/1612 , G05B2219/39505 , G06F2217/08 , G06F2217/16
摘要： A method for rapidly determining feasibility of a force optimization problem and for rapidly solving a feasible force optimization problem is disclosed. The method comprises formulating the force optimization problem or force feasibility problem as a convex optimization problem, formulating a primal barrier subproblem associated with the convex optimization problem, and solving the primal barrier subproblem. The method and related methods may also be used to solve each problem in a set of force optimization problems, determine the minimum or maximum force required to satisfy any of a set of force optimization problems, solve a force closure problem, compute a conservative contact force vector, or solve a feasible force optimization problem with bidirectional forces.
摘要翻译： 公开了一种用于快速确定力优化问题的可行性并快速解决可行的力优化问题的方法。 该方法包括将力优化问题或力可行性问题作为凸优化问题，制定与凸优化问题相关的原始障碍子问题，解决原始障碍子问题。 该方法和相关方法也可用于解决一组力优化问题中的每个问题，确定满足一组力优化问题中的任一者所需的最小或最大力，解决力闭合问题，计算保守接触力 或者用双向力解决可行的力优化问题。
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6.发明授权公开(公告)号：US07350164B2
公开(公告)日：2008-03-25
申请号：US10978497
申请日：2004-11-01
申请人： Yang Xu , Lawrence Pileggi , Stephen P. Boyd
发明人： Yang Xu , Lawrence Pileggi , Stephen P. Boyd
IPC分类号： G06F17/50
CPC分类号： G06F17/5063 , Y02T10/82
摘要： Optimization design method for configurable analog circuits and devices resulting from same. An implementation fabric for a given application domain can be accurately pre-characterized in terms of devices and parasitics. Customization structures are designed and characterized to be applied to the fabric to customize a device for a particular application. In some embodiments, characterization is accomplished by formulating a configurable design problem as an optimization with recourse problem, for example, a geometric programming with recourse (GPR) problem. Devices can be produced for multiple applications from the application domain using the same optimized fabric to provide predictable performance.
摘要翻译： 可配置的模拟电路和器件的优化设计方法。 给定应用领域的实现架构可以根据设备和寄生效应进行准确的预定义。 定制结构被设计和表征以应用于织物以定制特定应用的设备。 在一些实施例中，通过将可配置设计问题配置为具有追索问题的优化来实现表征，例如具有追索（GPR）问题的几何规划。 可以使用相同的优化结构从应用程序领域为多个应用程序生成设备，以提供可预测的性能。
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7.发明授权Optimization of integrated circuit properties through constraints using a dominant time constant 失效通过使用主导时间常数的约束优化集成电路特性公开(公告)号：US06289490B1
公开(公告)日：2001-09-11
申请号：US09169905
申请日：1998-10-08
IPC分类号： G06F1750
CPC分类号： G06F17/5063 , G06F17/505 , G06F17/5068
摘要： A method for optimizing an integrated circuit uses a dominant time constant of a transition of the circuit. A physical layout of the circuit is characterized in terms of design parameters. The circuit is modeled by a conductance matrix G and a capacitance matrix C, wherein G and C are affine functions of the design parameters. The optimization method comprises the step of finding the values of the design parameters that optimize a property of the circuit while simultaneously enforcing a constraint that the dominant time constant must be less than a maximum value tmax. Mathematically, the constraint on the dominant time constant can be written: tmax G−C≧0. The optimization method can be used when the circuit has a non-tree topology. Furthermore, when the design parameters comprise variables that relate to sizes of elements of the circuit, a topology of the circuit is optimized by the optimization method. In some embodiments the circuit is optimized for a plurality of transitions, and in some embodiments the design parameters are subject to design constraints.
摘要翻译： 用于优化集成电路的方法使用电路的转变的主要时间常数。 电路的物理布局的特点是设计参数。 电路由电导矩阵G和电容矩阵C建模，其中G和C是设计参数的仿射函数。 优化方法包括找到优化电路性质的设计参数的值的步骤，同时强制主导时间常数必须小于最大值tmax的约束。 在数学上，主导时间常数的约束可以写成：tmax G-C> = 0。 当电路具有非树形拓扑结构时，可以使用优化方法。 此外，当设计参数包括与电路元件的尺寸相关的变量时，通过优化方法优化电路的拓扑。 在一些实施例中，电路针对多个转换进行了优化，并且在一些实施例中，设计参数受到设计限制。
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