Method and apparatus using re-sampled tie records to characterize jitter in a digital signal
    1.
    发明授权
    Method and apparatus using re-sampled tie records to characterize jitter in a digital signal 失效
    使用重采样连接记录来表征数字信号中的抖动的方法和装置

    公开(公告)号:US07460591B2

    公开(公告)日:2008-12-02

    申请号:US10929194

    申请日:2004-08-30

    IPC分类号: H04B3/46 H04B17/00 H04Q1/20

    CPC分类号: H04L1/205

    摘要: Measurement of jitter in a system uses a digital test sequence including many repetitions of a test pattern. An Acquisition Record is made of the entire test sequence. A complete Time Interval Error (TIE) Record is made of the Acquisition Record. The complete TIE Record is separated into a collection of Component TIE Records, one for each transition in the test pattern, and that collectively contain all the different instances in the test sequence of that transition in the test pattern. An FFT is performed on each component TIE Record, and the component FFTs are processed to obtain timing jitter data for the digital signal.

    摘要翻译: 系统中抖动的测量使用数字测试序列,包括许多重复的测试模式。 采集记录由整个测试序列组成。 完整的时间间隔误差(TIE)记录由采集记录组成。 完整的TIE记录被分为组合TIE记录集合,一个用于测试模式中的每个转换,并且统一包含测试模式中该转换的测试序列中的所有不同实例。 对每个组件TIE记录执行FFT,并对分量FFT进行处理,以获得数字信号的定时抖动数据。

    Finding Low Frequency Random and Periodic Jitter in High Speed Digital Signals
    2.
    发明申请
    Finding Low Frequency Random and Periodic Jitter in High Speed Digital Signals 审中-公开
    在高速数字信号中寻找低频随机和周期性抖动

    公开(公告)号:US20080056341A1

    公开(公告)日:2008-03-06

    申请号:US11469093

    申请日:2006-08-31

    申请人: Steven D. Draving

    发明人: Steven D. Draving

    IPC分类号: H04B17/00 H04L7/00

    CPC分类号: H04L1/205

    摘要: Simultaneously measurements of jitter in a high speed signal expected to exhibit both short and long period jitter are made even when the amount of acquisition memory is fixed and cannot be increased to allow storage of consecutive uninterrupted high speed samples for the duration of the longest period. The signal is sampled in repetitive bursts whose sample rate within a burst is high, but whose time between bursts is long enough to prevent a Segmented Acquisition Memory being filled, and a Segmented Acquisition Record from being completed, until a period of time that is long enough to encompass measurement of the long period jitter has transpired. The Segmented Acquisition Record is analyzed by a technique that tolerates the ‘natural holes’ in a TIE Record caused by the absence of a transition between consecutive identical logical values. That technique is extended to allow the ‘dead space’ between bursts to appear as ‘artificial holes’ that also do not poison or corrupt the extraction of the desired jitter description.

    摘要翻译: 即使当采集存储器的数量是固定的并且不能被增加以允许在最长周期的持续时间内存储连续的不间断的高速采样时,也可以同时测量预期表现出短时间和长周期抖动的高速信号中的抖动的抖动。 该信号以突发内的采样率高的重复脉冲串进行采样,但是其脉冲串之间的时间足够长以防止分段采集存储器被填充,并且分段采集记录被完成,直到长时间段 足以涵盖测量长时间抖动的测量。 分段采集记录通过一种技术进行分析,该技术容忍由连续相同的逻辑值之间不存在转换引起的TIE记录中的“自然空穴”。 这种技术被扩展以允许突发之间的“死空间”显示为“人造孔”,也不会中毒或破坏所需抖动描述的提取。

    Finding data dependent jitter with a DDJ calculator configured by regression
    3.
    发明授权
    Finding data dependent jitter with a DDJ calculator configured by regression 失效
    使用由回归配置的DDJ计算器来查找与数据相关的抖动

    公开(公告)号:US07248982B1

    公开(公告)日:2007-07-24

    申请号:US11479414

    申请日:2006-06-29

    IPC分类号: G01R29/26 H04Q1/20

    CPC分类号: G01R31/31709 H04L1/205

    摘要: Discovery of DDJ within measured Total Jitter (TJ) begins with a suitably long digital Test Pattern, from which an Acquisition Record is made. A Time Interval Error/Voltage Error Record is made of the Acquisition Record. A Template defines a collection of associated bit value or transitions that are nearby or otherwise related to a bit location of interest, and through the applied test pattern produces a sequence of Data Symbols. The TIE/VLE Record is examined, and a parameter is measured for each Data Symbol as it occurs in the Test Pattern. A regression technique may be use to find coefficients for a DDJ Calculator whose inputs are the Data Symbols and whose output is respective values of DDJ. Subsequent separation of DDJ from TJ is possible because DDJ is correlated with the Data Symbols, while Periodic Jitter (PJ) and Random Jitter (RJ) can be expected to average to near zero over a sufficient number of instances of a given Data Symbol.

    摘要翻译: 在测量的总抖动(TJ)内发现DDJ以适当长的数字测试模式开始,从中获取采集记录。 时间间隔错误/电压错误记录由采集记录组成。 模板定义了与感兴趣的位位置相邻或相关的关联位值或转换的集合,并且通过应用的测试模式产生一系列数据符号。 检查TIE / VLE记录,并且在测试模式中发生每个数据符号时测量一个参数。 可以使用回归技术来找到DDJ计算器的系数,其输入是数据符号,其输出是DDJ的相应值。 DDJ与TJ之间的分离是可能的,因为DDJ与数据符号相关,而在给定数据符号的足够数量的情况下,期望抖动(PJ)和随机抖动(RJ)可以平均接近零。

    Incident-edge detecting probe
    4.
    发明授权
    Incident-edge detecting probe 失效
    突发检测探头

    公开(公告)号:US06262602B1

    公开(公告)日:2001-07-17

    申请号:US09272034

    申请日:1999-03-18

    申请人: Steven D. Draving

    发明人: Steven D. Draving

    IPC分类号: H03K5153

    摘要: A comparator detects rising transitions of an input waveform and another comparator detects falling transitions. Each comparator detects their respective transition with a different threshold voltage. The outputs of these comparators are multiplexed into the clock input of a flip-flop. The flip-flop's inverted output is connected through a time delay to the input of the flip-flop to form a toggling configuration. The output of the time delay is also connected to the select input of a multiplexer that controls the multiplexer to multiplex the outputs of the two comparators into the clock input of the flip-flop. The threshold voltages chosen for the two comparators are chosen to be in the center of the incident edges of the distorted signal of a source-terminated transmission line. The time delay is chosen to be longer than the difference between the arrival of the incident wave and the arrival of the first reflected wave.

    摘要翻译: 比较器检测输入波形的上升沿,另一个比较器检测下降的转换。 每个比较器用不同的阈值电压检测它们各自的转变。 这些比较器的输出被复用到触发器的时钟输入端。 触发器的反相输出通过时间延迟连接到触发器的输入以形成切换配置。 时间延迟的输出也连接到控制多路复用器的多路复用器的选择输入,以将两个比较器的输出复用到触发器的时钟输入中。 选择用于两个比较器的阈值电压被选择为源端接传输线的失真信号的入射边缘的中心。 时间延迟被选择为比入射波的到达和第一反射波的到达之间的差更长。

    Pseudo-random repetitive sampling of a signal
    5.
    发明授权
    Pseudo-random repetitive sampling of a signal 失效
    信号的伪随机重复采样

    公开(公告)号:US5315627A

    公开(公告)日:1994-05-24

    申请号:US20474

    申请日:1993-02-22

    申请人: Steven D. Draving

    发明人: Steven D. Draving

    CPC分类号: G01R13/34

    摘要: A pseudo-random repetitive sampling circuit which is capable of sampling fast signals, sampling negative and positive time around a trigger event, and rapidly building the waveform for display. The circuit accomplishes this by acquiring negative and positive time in two different ways. Positive time information is acquired using a modified form of sequential sampling, since sequential sampling can rapidly build the signal for samples that occur after the trigger event. The system also may take multiple samples for each trigger event. For samples occurring prior to the trigger event, the system uses a modified form of random repetitive sampling. The modification comprises sampling of the waveform prior to allowing any trigger events to occur, and qualifying each trigger event so that a trigger event is only recognized when it occurs in a programmable time window after a sample.

    摘要翻译: 一种伪随机重复采样电路,其能够对快速信号进行采样,在触发事件周围采样负和正周期,并快速构建用于显示的波形。 电路通过两种不同的方式获得负面和积极的时间来实现。 使用顺序采样的修改形式获取正时间信息,因为顺序采样可以快速构建在触发事件之后发生的样本的信号。 系统还可以为每个触发事件采取多个样本。 对于在触发事件之前发生的样本,系统使用随机重复抽样的修改形式。 修改包括在允许任何触发事件发生之前对波形进行采样,并且对每个触发事件进行限定,使得仅当在样本之后的可编程时间窗口中发生触发事件时才能识别触发事件。

    Finding random jitter in an arbitrary non-repeating data signal
    6.
    发明授权
    Finding random jitter in an arbitrary non-repeating data signal 失效
    在任意非重复数据信号中查找随机抖动

    公开(公告)号:US07251572B1

    公开(公告)日:2007-07-31

    申请号:US11486559

    申请日:2006-07-14

    IPC分类号: G06F19/00 H04B17/00

    CPC分类号: H04L1/205 H04L1/24

    摘要: Discovery of RJ assumes an Adjusted TIE Record for TJ from which DDJ has been removed. What remains is PJ+RJ, from whose Fourier Transform PJ is ‘synthetically de-convolved’ to leave just RJ: Calculate the Power Density Spectrum of PJ+RJ, and determine a threshold that indicates a PJ component. Identify in the PDS the largest frequency component that exceeds the threshold, otherwise there is no significant PJ and PJ+RJ can be taken as RJ. If a frequency component exceeds the threshold, take the largest and calculate what the convolution of it with the FT of the Transition Pattern would be if this circumstance were to occur in isolation, and then remove it from PJ+RJ. Repeat with continued iterations, until there are no further PJ components.

    摘要翻译: 发现RJ假定已经删除了DDJ的TJ的调整TIE记录。 剩下的是PJ + RJ,其傅里叶变换PJ是“合成去卷积”,只留下RJ:计算PJ + RJ的功率密度谱,并确定表示PJ分量的阈值。 在PDS中识别超过阈值的最大频率分量,否则没有显着的PJ,PJ + RJ可以取为RJ。 如果频率分量超过阈值,则取最大值,并计算出如果这种情况是孤立发生,则转换模式的FT的卷积将会与PJ + RJ相同。 重复连续迭代,直到没有进一步的PJ组件。

    Wide-bandwidth probe using pole-zero cancellation
    7.
    发明授权
    Wide-bandwidth probe using pole-zero cancellation 失效
    宽带探测使用极零消除

    公开(公告)号:US06483284B1

    公开(公告)日:2002-11-19

    申请号:US09885709

    申请日:2001-06-20

    IPC分类号: G01R3102

    CPC分类号: G01R1/06772 G01R1/06766

    摘要: A probe apparatus for use with analyzing devices, primarily oscilloscopes and logic analyzers, which uses pole-zero cancellation to provide a probe with low capacitance and wide bandwidth. Pole-zero cancellation enables the probe to have constant gain at all frequencies. In one embodiment, the coaxial cable between the probe tip and the replication amplifier is terminated in its characteristic impedance to provide constant gain at all frequencies regardless of cable length. Use of pole-zero cancellation and thick film technology enables building a probe with a small, durable tip.

    摘要翻译: 用于分析设备,主要是示波器和逻辑分析仪的探头设备,其使用极点消除来提供具有低电容和宽带宽的探头。 极零取消使探头在所有频率处具有恒定的增益。 在一个实施例中,探针尖端和复制放大器之间的同轴电缆在其特征阻抗中终止,以在所有频率上提供恒定增益,而不管电缆长度如何。 使用极零消除和厚膜技术可以构建具有小型耐用尖端的探头。

    Electronic probe for measuring high impedance tri-state logic circuits

    公开(公告)号:US06362614B1

    公开(公告)日:2002-03-26

    申请号:US09755265

    申请日:2001-01-05

    申请人: Steven D Draving

    发明人: Steven D Draving

    IPC分类号: G01R3102

    摘要: An electronic probe has a termination portion, a filter, and an impedance device. The termination portion is connected between a transmission line end and a common node. The termination portion has a termination resistor and a termination capacitor connected in series between the transmission line end and the common node. The filter has a resistor connected in parallel with a capacitor and an inductor connected in series with the filter resistor and filter capacitor combination. The components are connected between the transmission line end and an output. An impedance device is connected between the output and the common node. A zero is associated with the termination portion and a pole is associated with the filter. The frequency of the zero is approximately equal to the frequency of the pole. The probe provides a device for measuring tri-state logic circuits without overloading the circuits.

    Method and apparatus for determining equalization coefficients
    9.
    发明授权
    Method and apparatus for determining equalization coefficients 有权
    用于确定均衡系数的方法和装置

    公开(公告)号:US08223830B2

    公开(公告)日:2012-07-17

    申请号:US12486921

    申请日:2009-06-18

    申请人: Steven D. Draving

    发明人: Steven D. Draving

    IPC分类号: H03K5/159

    CPC分类号: H04L25/0305

    摘要: A system for filtering a data signal includes an input configured to receive the data signal through a transmission medium and a filter configured to remove distortion from the received data signal using equalization coefficients. The system further includes a processing unit configured to determine dynamically the equalization coefficients of the filter without using a predetermined training pattern in the received data signal.

    摘要翻译: 用于过滤数据信号的系统包括被配置为通过传输介质接收数据信号的输入和被配置为使用均衡系数从接收到的数据信号中去除失真的滤波器。 该系统还包括处理单元,其被配置为动态地确定滤波器的均衡系数,而不在接收的数据信号中使用预定的训练模式。

    Method for equalizing a digital signal through removal of data dependent jitter
    10.
    发明授权
    Method for equalizing a digital signal through removal of data dependent jitter 有权
    通过消除数据相关抖动来均衡数字信号的方法

    公开(公告)号:US07480355B2

    公开(公告)日:2009-01-20

    申请号:US11059007

    申请日:2005-02-16

    IPC分类号: H04L1/00

    CPC分类号: G11B20/10046 G11B20/10009

    摘要: Equalized Acquisition Record are prepared from Original Acquisition Records reflecting Total Jitter and from an existing description of DDJ. Removal of timing DDJ alters the locations of edges associated with data events. Voltage DDJ adjusts the asserted voltage in the central portion of a Unit Interval. One technique for equalizing timing jitter variably interpolates along the existing Original Acquisition Record to discover plausible new voltage values to assign to existing sample locations along the time axis. Another technique construes the desired amount of correction for each data event as an impulse that is applied to a Finite Impulse Response Filter whose output is a Voltage Correction Waveform having a smoothed voltage excursion. Time variant voltage values output from the Finite Impulse Response Filter are collected into a Voltage Correction Waveform Record having entry times found in the Original Acquisition Record. An entry by entry addition of these two Records produces the Equalized Acquisition Record.

    摘要翻译: 平均收购记录由原始收购记录反映总计抖动和DDJ的现有描述编制。 删除定时DDJ会更改与数据事件相关联的边沿的位置。 电压DDJ调整单位间隔中央部分的有效电压。 用于均衡时序抖动的一种技术可以沿现有的原始采集记录进行可变内插,以发现可能的新电压值,以分配给沿着时间轴的现有采样位置。 另一种技术将每个数据事件的期望量的校正结果作为施加到有限脉冲响应滤波器的脉冲,其输出是具有平滑电压偏移的电压校正波形。 从有限脉冲响应滤波器输出的时变电压值被收集到具有原始采集记录中的入口时间的电压校正波形记录中。 这两个记录的条目添加条目产生均衡收购记录。