Finding data dependent jitter with a DDJ calculator configured by regression
    1.
    发明授权
    Finding data dependent jitter with a DDJ calculator configured by regression 失效
    使用由回归配置的DDJ计算器来查找与数据相关的抖动

    公开(公告)号:US07248982B1

    公开(公告)日:2007-07-24

    申请号:US11479414

    申请日:2006-06-29

    IPC分类号: G01R29/26 H04Q1/20

    CPC分类号: G01R31/31709 H04L1/205

    摘要: Discovery of DDJ within measured Total Jitter (TJ) begins with a suitably long digital Test Pattern, from which an Acquisition Record is made. A Time Interval Error/Voltage Error Record is made of the Acquisition Record. A Template defines a collection of associated bit value or transitions that are nearby or otherwise related to a bit location of interest, and through the applied test pattern produces a sequence of Data Symbols. The TIE/VLE Record is examined, and a parameter is measured for each Data Symbol as it occurs in the Test Pattern. A regression technique may be use to find coefficients for a DDJ Calculator whose inputs are the Data Symbols and whose output is respective values of DDJ. Subsequent separation of DDJ from TJ is possible because DDJ is correlated with the Data Symbols, while Periodic Jitter (PJ) and Random Jitter (RJ) can be expected to average to near zero over a sufficient number of instances of a given Data Symbol.

    摘要翻译: 在测量的总抖动(TJ)内发现DDJ以适当长的数字测试模式开始,从中获取采集记录。 时间间隔错误/电压错误记录由采集记录组成。 模板定义了与感兴趣的位位置相邻或相关的关联位值或转换的集合,并且通过应用的测试模式产生一系列数据符号。 检查TIE / VLE记录,并且在测试模式中发生每个数据符号时测量一个参数。 可以使用回归技术来找到DDJ计算器的系数,其输入是数据符号,其输出是DDJ的相应值。 DDJ与TJ之间的分离是可能的,因为DDJ与数据符号相关,而在给定数据符号的足够数量的情况下,期望抖动(PJ)和随机抖动(RJ)可以平均接近零。

    Finding random jitter in an arbitrary non-repeating data signal
    2.
    发明授权
    Finding random jitter in an arbitrary non-repeating data signal 失效
    在任意非重复数据信号中查找随机抖动

    公开(公告)号:US07251572B1

    公开(公告)日:2007-07-31

    申请号:US11486559

    申请日:2006-07-14

    IPC分类号: G06F19/00 H04B17/00

    CPC分类号: H04L1/205 H04L1/24

    摘要: Discovery of RJ assumes an Adjusted TIE Record for TJ from which DDJ has been removed. What remains is PJ+RJ, from whose Fourier Transform PJ is ‘synthetically de-convolved’ to leave just RJ: Calculate the Power Density Spectrum of PJ+RJ, and determine a threshold that indicates a PJ component. Identify in the PDS the largest frequency component that exceeds the threshold, otherwise there is no significant PJ and PJ+RJ can be taken as RJ. If a frequency component exceeds the threshold, take the largest and calculate what the convolution of it with the FT of the Transition Pattern would be if this circumstance were to occur in isolation, and then remove it from PJ+RJ. Repeat with continued iterations, until there are no further PJ components.

    摘要翻译: 发现RJ假定已经删除了DDJ的TJ的调整TIE记录。 剩下的是PJ + RJ,其傅里叶变换PJ是“合成去卷积”,只留下RJ:计算PJ + RJ的功率密度谱,并确定表示PJ分量的阈值。 在PDS中识别超过阈值的最大频率分量,否则没有显着的PJ,PJ + RJ可以取为RJ。 如果频率分量超过阈值,则取最大值,并计算出如果这种情况是孤立发生,则转换模式的FT的卷积将会与PJ + RJ相同。 重复连续迭代,直到没有进一步的PJ组件。

    Wide-bandwidth probe using pole-zero cancellation
    3.
    发明授权
    Wide-bandwidth probe using pole-zero cancellation 失效
    宽带探测使用极零消除

    公开(公告)号:US06483284B1

    公开(公告)日:2002-11-19

    申请号:US09885709

    申请日:2001-06-20

    IPC分类号: G01R3102

    CPC分类号: G01R1/06772 G01R1/06766

    摘要: A probe apparatus for use with analyzing devices, primarily oscilloscopes and logic analyzers, which uses pole-zero cancellation to provide a probe with low capacitance and wide bandwidth. Pole-zero cancellation enables the probe to have constant gain at all frequencies. In one embodiment, the coaxial cable between the probe tip and the replication amplifier is terminated in its characteristic impedance to provide constant gain at all frequencies regardless of cable length. Use of pole-zero cancellation and thick film technology enables building a probe with a small, durable tip.

    摘要翻译: 用于分析设备,主要是示波器和逻辑分析仪的探头设备,其使用极点消除来提供具有低电容和宽带宽的探头。 极零取消使探头在所有频率处具有恒定的增益。 在一个实施例中,探针尖端和复制放大器之间的同轴电缆在其特征阻抗中终止,以在所有频率上提供恒定增益,而不管电缆长度如何。 使用极零消除和厚膜技术可以构建具有小型耐用尖端的探头。

    Electronic probe for measuring high impedance tri-state logic circuits

    公开(公告)号:US06362614B1

    公开(公告)日:2002-03-26

    申请号:US09755265

    申请日:2001-01-05

    申请人: Steven D Draving

    发明人: Steven D Draving

    IPC分类号: G01R3102

    摘要: An electronic probe has a termination portion, a filter, and an impedance device. The termination portion is connected between a transmission line end and a common node. The termination portion has a termination resistor and a termination capacitor connected in series between the transmission line end and the common node. The filter has a resistor connected in parallel with a capacitor and an inductor connected in series with the filter resistor and filter capacitor combination. The components are connected between the transmission line end and an output. An impedance device is connected between the output and the common node. A zero is associated with the termination portion and a pole is associated with the filter. The frequency of the zero is approximately equal to the frequency of the pole. The probe provides a device for measuring tri-state logic circuits without overloading the circuits.

    Method for equalizing a digital signal through removal of data dependent jitter
    5.
    发明授权
    Method for equalizing a digital signal through removal of data dependent jitter 有权
    通过消除数据相关抖动来均衡数字信号的方法

    公开(公告)号:US07480355B2

    公开(公告)日:2009-01-20

    申请号:US11059007

    申请日:2005-02-16

    IPC分类号: H04L1/00

    CPC分类号: G11B20/10046 G11B20/10009

    摘要: Equalized Acquisition Record are prepared from Original Acquisition Records reflecting Total Jitter and from an existing description of DDJ. Removal of timing DDJ alters the locations of edges associated with data events. Voltage DDJ adjusts the asserted voltage in the central portion of a Unit Interval. One technique for equalizing timing jitter variably interpolates along the existing Original Acquisition Record to discover plausible new voltage values to assign to existing sample locations along the time axis. Another technique construes the desired amount of correction for each data event as an impulse that is applied to a Finite Impulse Response Filter whose output is a Voltage Correction Waveform having a smoothed voltage excursion. Time variant voltage values output from the Finite Impulse Response Filter are collected into a Voltage Correction Waveform Record having entry times found in the Original Acquisition Record. An entry by entry addition of these two Records produces the Equalized Acquisition Record.

    摘要翻译: 平均收购记录由原始收购记录反映总计抖动和DDJ的现有描述编制。 删除定时DDJ会更改与数据事件相关联的边沿的位置。 电压DDJ调整单位间隔中央部分的有效电压。 用于均衡时序抖动的一种技术可以沿现有的原始采集记录进行可变内插,以发现可能的新电压值,以分配给沿着时间轴的现有采样位置。 另一种技术将每个数据事件的期望量的校正结果作为施加到有限脉冲响应滤波器的脉冲,其输出是具有平滑电压偏移的电压校正波形。 从有限脉冲响应滤波器输出的时变电压值被收集到具有原始采集记录中的入口时间的电压校正波形记录中。 这两个记录的条目添加条目产生均衡收购记录。

    Method for edge mounting flex media to a rigid PC board
    6.
    发明授权
    Method for edge mounting flex media to a rigid PC board 失效
    将柔性介质边缘安装到刚性PC板的方法

    公开(公告)号:US06378757B1

    公开(公告)日:2002-04-30

    申请号:US09773075

    申请日:2001-01-31

    IPC分类号: B23K3102

    摘要: Edge mounting flexible media to a rigid PC board construction can be achieved by various methods. In any method used, there is a desire to create solderable pads on the edge of the rigid PC board. In accordance with the invention, the solderable pads are created by edge plating the PC Board or by a sliced via method. Depending on the type of flexible transmission line used, the construction will differ accordingly. For terminating flexible circuit media, the flex pads are laid out in such a way that the pads are etched in a configuration that matches up with the edge pads on the rigid PC Board. Solder past is then applied to the pads on the flex. The rigid PC Board is fixtured at a right angle to the flex and run through the reflow oven.

    摘要翻译: 通过各种方法可以实现将柔性介质固定到刚性PC板结构上。 在任何使用的方法中,希望在刚性PC板的边缘上形成可焊接焊盘。 根据本发明,通过边缘电镀PC板或通过切片通孔方法来产生可焊焊盘。 根据所使用的柔性传输线的类型,施工方式会有所不同。 为了终止柔性电路介质,柔性焊盘以这样一种方式布置,使得焊盘以与刚性PC板上的边缘焊盘相配合的构造被蚀刻。 然后将焊锡过去施加到柔性件上的焊盘。 刚性PC板与弯曲件成直角固定,并穿过回流炉。

    Trigger jitter reduction for an internally triggered real time digital oscilloscope
    7.
    发明授权
    Trigger jitter reduction for an internally triggered real time digital oscilloscope 失效
    内部触发实时数字示波器的触发抖动降低

    公开(公告)号:US06753677B1

    公开(公告)日:2004-06-22

    申请号:US10376748

    申请日:2003-02-28

    IPC分类号: G01R1320

    CPC分类号: G01R13/0254

    摘要: Trigger jitter in an internally triggered real time digital oscilloscope can be reduced through correcting the horizontal position value obtained from a conventional trigger interpolation mechanism by an error or substitute amount learned from an inspection of the acquisition record that notes where in the acquisition record the signal actually crossed the trigger threshold. The display (and measurement) sub-systems that utilize the selection by panning and zooming of a portion of the acquisition record for viewing (and measurement) are supplied with the acquisition record portion of interest, and with an associated horizontal position value that originates with trigger interpolation and that may be subsequently modified by panning. After the trigger circuit detects the trigger condition for a new acquisition record, the voltage threshold for the trigger level in use by the trigger circuit can be compared to the region proximate the trigger location in the acquisition record to determine by further local interpolation the precise location in the acquisition record where the triggering event should have occurred. This allows the determination of a correct and jitter free horizontal position value. Actual display of the desired portion of each new acquisition record then proceeds by supplying to the display rendering system a corrected associated horizontal position value. This reduction in visible trigger jitter is also beneficial to measurements made on the displayed trace.

    摘要翻译: 内部触发的实时数字示波器中的触发抖动可以通过校正从常规触发插值机制获得的水平位置值,通过从采集记录的检查中学到的错误或替代量来减少,记录在采集记录中实际信号实际上 越过触发阈值。 利用通过平移和缩放用于观看(和测量)的采集记录的一部分进行选择的显示(和测量)子系统被提供有感兴趣的获取记录部分,并且具有源自于的相关联的水平位置值 触发插值,然后可以通过平移进行修改。 在触发电路检测到新的采集记录的触发条件之后,触发电路使用的触发电平的电压阈值可以与采集记录中的触发位置附近的区域进行比较,以通过进一步的局部插值确定精确位置 在触发事件应该发生的收购记录中。 这允许确定正确和无抖动的水平位置值。 然后通过向显示渲染系统提供校正的相关联的水平位置值来进行每个新的采集记录的所需部分的实际显示。 可见触发抖动的这种减少对于在显示的迹线上进行的测量也是有益的。

    Split resistor probe and method
    8.
    发明授权

    公开(公告)号:US06362635B1

    公开(公告)日:2002-03-26

    申请号:US09774195

    申请日:2001-01-29

    IPC分类号: G01R104

    摘要: Disclosed is a system and method for probing target pads in a dense pad array while minimizing distortion of a signal on the pads probed due to the probe load on the target pads and minimizing an amount of cross-talk between aggressor conductors in the dense pad array and the probe tip. In one embodiment, a probe tip arrangement is provided comprising a pad located in a dense pad array and a first probe tip resistor having first and second ends, the first end being coupled to the pad. The first probe tip resistor is positioned directly adjacent to the pad as closely as manufacturing processes will allow. The probe tip arrangement further includes an access transmission line coupled to the second end of the first probe tip resistor and extending outside of the dense pad array to a second probe tip resistor The second probe tip resistor may, in turn, be coupled to an electrical connector which in turn is coupled to a logic analyzer or oscilloscope to test the signal on the respective pad of the pad array.

    Split resistor probe and method
    9.
    发明授权
    Split resistor probe and method 失效
    分体电阻探头和方法

    公开(公告)号:US06225816B1

    公开(公告)日:2001-05-01

    申请号:US09288347

    申请日:1999-04-08

    IPC分类号: G01R104

    CPC分类号: G01R1/06772

    摘要: Disclosed is a system and method for probing target pads in a dense pad array while minimizing distortion of a signal on the pads probed due to the probe load on the target pads and minimizing an amount of cross-talk between aggressor conductors in the dense pad array and the probe tip. In one embodiment, a probe tip arrangement is provided comprising a pad located in a dense pad array and a first probe tip resistor having first and second ends, the first end being coupled to the pad. The first probe tip resistor is positioned directly adjacent to the pad as closely as manufacturing processes will allow. The probe tip arrangement further includes an access transmission line coupled to the second end of the first probe tip resistor and extending outside of the dense pad array to a second probe tip resistor. The second probe tip resistor may, in turn, be coupled to an electrical connector which in turn is coupled to a logic analyzer or oscilloscope to test the signal on the respective pad of the pad array.

    摘要翻译: 公开了一种用于在密集焊盘阵列中探测目标焊盘的系统和方法,同时使由于目标焊盘上的探头负载而探测到的焊盘上的信号的失真最小化并且使致密焊盘阵列中的侵扰器导体之间的串扰量最小化 和探针尖。 在一个实施例中,提供探针尖端装置,其包括位于致密垫阵列中的垫,以及具有第一和第二端的第一探针尖端电阻器,第一端耦合到衬垫。 第一个探针尖端电阻直接靠近焊盘,与制造过程相同。 探针尖端布置还包括连接到第一探针尖端电阻器的第二端并且将密度垫阵列外延伸到第二探针尖端电阻器的接入传输线。 第二探针尖端电阻又可耦合到电连接器,电连接器又连接到逻辑分析仪或示波器,以测试焊盘阵列的相应焊盘上的信号。