公开(公告)号：US07343432B1

公开(公告)日：2008-03-11

申请号：US10666773

申请日：2003-09-19

Applicant: Brett D. Niver ,  Steven R. Chalmer ,  Steven T. McClure

Inventor： Brett D. Niver ,  Steven R. Chalmer ,  Steven T. McClure

IPC: G06F13/00 ,  G06F13/28 ,  G06F17/30

CPC classification number: G06F9/526

Abstract: Described is a distributed lock processing technique that may be used to coordinate access to globally accessed resource between endpoints using the connecting message fabric. Processors in a data storage system communicate using the message switch of the message fabric. Each processor is an endpoint within a data storage system. Each endpoint, prior to requesting a lock, dynamically determines a current lock owner of the lock to be requested in accordance with a determination of which endpoints are available as lock owners at the current time. The lock request is issued to the current lock owner with a requested time period used by the lock owner to determine an expiration time. The lock expires automatically at the expiration time even if the lock holder becomes unavailable. If the current lock owner becomes unavailable, a new lock owner is determined prior to the next request for that lock.

Abstract translation: 描述了一种分布式锁处理技术，其可用于协调使用连接消息结构的端点之间对全局访问资源的访问。 数据存储系统中的处理器使用消息结构的消息交换进行通信。 每个处理器是数据存储系统中的端点。 在请求锁之前，每个端点根据在当前时间作为锁拥有者可用的哪些端点的确定动态地确定要请求的锁的当前锁拥有者。 锁请求将以锁所有者使用的请求时间段发出给当前锁所有者以确定到期时间。 即使锁定架不可用，锁定也将在到期时自动过期。 如果当前的锁拥有者变得不可用，则在下一次请求该锁之前确定新的锁拥有者。

公开(公告)号：US07136969B1

公开(公告)日：2006-11-14

申请号：US10462949

申请日：2003-06-17

Applicant: Brett D. Niver ,  Steven R. Chalmer ,  Steven T. McClure

Inventor： Brett D. Niver ,  Steven R. Chalmer ,  Steven T. McClure

IPC: G06F12/00

CPC classification number: G06F12/0831 ,  G06F12/0808

Abstract: Described is a technique for maintaining local cache coherency between endpoints using the connecting message fabric. Processors in a data storage system communicate using the message fabric. Each processor is an endpoint having its own local cache storage in which portions of global memory may be locally cached. A write through caching technique is described. Each local cache line of data of each processor is either in an invalid or a shared state. When a write to global memory is performed by a processor (write miss or a write hit), the following are performed atomically: the global memory is updated, other processor's local cache lines of the data are invalidated, verification of invalidation is received by the processor, and the processor's local copy is updated. Other processors' cache lines are invalidated by transmission of an invalidate command by the processor. A processor updates its local cache lines upon the next read miss or write miss of the updated cacheable global memory.

公开(公告)号：US5020155A

公开(公告)日：1991-05-28

申请号：US422659

申请日：1989-10-17

Applicant: Robert J. Griffin ,  Steven R. Chalmer

Inventor： Robert J. Griffin ,  Steven R. Chalmer

IPC: H04B10/10

CPC classification number: H04B10/1149

Abstract: Orator units are associated with particular exhibit or guiding locations and provide an audio commentary by the medium of ON and OFF states of electromagnetic radiation. Auditor units are portable units associated with paritcular viewers or users and are adapted to detect the electromagnetic radiation and produce therefrom the audio commentary. The auditor unit may be designed to signal, the orator through ON or OFF states of electromagnetic radiation the request for a commentary. The orator unit may be designed to provide a commentary in response to the auditor request. An orator may be designed to provide a plurality of commentaries on corresponding frequency modulation (FM) channels (which are converted to and from electromagnetic radiation) and the orator and auditor may be designed so that the orator may tune the auditor to demodulate only the FM channel corresponding to the auditor's selected type and time of commentary. A plate encoded with conducting and non-conducting areas may be used to encode an auditor unit to cause it to select the type commentary desired by a viewer or user.

Abstract translation: 演讲者单位与特定展览或指导位置相关联，并通过电磁辐射的ON和OFF状态介质提供音频评论。 审计单位是与专用观众或用户相关联的便携式单元，并且适于检测电磁辐射并从中产生音频评论。 审核单元可以被设计为通过电磁辐射的ON或OFF状态向演讲者发出对评论的请求。 演说单位可以被设计成响应于审核员请求提供评论。 演说者可以被设计成在相应的频率调制（FM）信道（其被转换成和从电磁辐射转换）上提供多个评论，并且演讲者和审核员可以被设计成使得演讲者可以调整审核员以仅解调FM 渠道对应审计师的选定类型和评论时间。 编码有导电和非导电区域的板可以用于对审核单元进行编码，以使其选择观看者或用户所期望的类型评注。

公开(公告)号：US08996821B1

公开(公告)日：2015-03-31

申请号：US11011177

申请日：2004-12-15

Applicant: Steven T. McClure ,  Steven R. Chalmer ,  Brett D. Niver

Inventor： Steven T. McClure ,  Steven R. Chalmer ,  Brett D. Niver

IPC: G06F12/00 ,  G06F13/00 ,  G06F13/28 ,  G06F21/50

CPC classification number: G06F21/50 ,  G06F9/545

Abstract: Methods and systems are disclosed for providing resource sharing in a computing environment using file descriptor isomorphism. The methods and systems may perform a method in a computing environment having processor systems executing processes. The method may include receiving a request from a first process to access a first resource. Further, the method may include generating a first Global File Descriptor (GFD) that references a first entry in a GFD table, the first GFD entry including a reference to a first entry in a resource descriptor table pointing to the first resource. Based on the request, at least one GFD field associated with the first GFD entry is configured. Thus, methods and systems may manage access by the first process to the first resource using the first GFD entry.

Abstract translation: 公开了用于在使用文件描述符同构的计算环境中提供资源共享的方法和系统。 方法和系统可以在具有处理器系统执行过程的计算环境中执行方法。 该方法可以包括从第一进程接收访问第一资源的请求。 此外，该方法可以包括生成引用GFD表中的第一条目的第一全局文件描述符（GFD），第一GFD条目包括对指向第一资源的资源描述符表中的第一条目的引用。 基于该请求，配置与第一GFD条目相关联的至少一个GFD字段。 因此，方法和系统可以使用第一GFD条目来管理第一进程对第一资源的访问。

公开(公告)号：US08533696B1

公开(公告)日：2013-09-10

申请号：US11540459

申请日：2006-09-29

Applicant: Steven R. Chalmer ,  Steven T. McClure ,  David L. Reese

Inventor： Steven R. Chalmer ,  Steven T. McClure ,  David L. Reese

IPC: G06F9/45

CPC classification number: G06F9/4881 ,  G06F2209/483

Abstract: Methods and systems are disclosed that relate to running a plurality of software instances on an embedded computer system without requiring substantial modifications to each software instance. An exemplary method includes storing context information relating to a first instance. An instance includes a set of independent threads of execution each with its own code context, interrupt service routines, drivers, and operating system services. Both a second instance and a thread associated with the second instance are chosen to run. Context information relating to the second instance is restored and the second instance is run on the operating system.

Abstract translation: 公开了涉及在嵌入式计算机系统上运行多个软件实例而不需要对每个软件实例进行实质性修改的方法和系统。 一种示例性方法包括存储与第一实例有关的上下文信息。 一个实例包括一组独立的执行线程，每一个都有自己的代码上下文，中断服务程序，驱动程序和操作系统服务。 选择第二个实例和与第二个实例相关联的线程来运行。 与第二实例相关的上下文信息被恢复，并且第二实例在操作系统上运行。

公开(公告)号：US08424013B1

公开(公告)日：2013-04-16

申请号：US11540458

申请日：2006-09-29

Applicant: Steven R. Chalmer ,  Steven T. McClure ,  David L. Reese

Inventor： Steven R. Chalmer ,  Steven T. McClure ,  David L. Reese

IPC: G06F9/46 ,  G06F7/38

CPC classification number: G06F9/461 ,  G06F9/4812

Abstract: Methods and systems are disclosed that relate to handling interrupts across multiple software instances. An exemplary method includes receiving an interrupt at a current CPU. An instance includes a set of independent threads of execution each with its own code context, interrupt service routines, drivers, and operating system services. The method further includes storing context information relating to the first instance, identifying the second instance associated with the interrupt, running at least one interrupt service routine, and restoring the context information relating to the first instance.

Abstract translation: 公开了涉及跨多个软件实例处理中断的方法和系统。 一种示例性方法包括在当前CPU处接收中断。 一个实例包括一组独立的执行线程，每一个都有自己的代码上下文，中断服务程序，驱动程序和操作系统服务。 该方法还包括存储与第一实例有关的上下文信息，识别与中断相关联的第二实例，运行至少一个中断服务例程，以及恢复与第一实例有关的上下文信息。

公开(公告)号：US08085794B1

公开(公告)日：2011-12-27

申请号：US11454739

申请日：2006-06-16

Applicant: Brett D. Niver ,  William F. Baxter, III ,  Steven R. Chalmer

Inventor： Brett D. Niver ,  William F. Baxter, III ,  Steven R. Chalmer

IPC: H04L12/56

CPC classification number: H04L45/54

Abstract: Described are techniques for determining a set of routing information for a plurality of components performing routing in a network. Destinations that are directly connected to each of the plurality of components are determined. Each of the plurality of components is associated with one of a plurality of routing tables. Each of the plurality of routing tables stores routing information in accordance with destinations in the network. Cost information is stored in the plurality of routing tables for each destination directly connected to one of the plurality of components. For each of the plurality of components, a set of neighboring components is determined. For each neighboring component, routing information for a destination is adopted from the routing table of said each neighboring component in accordance with an adoption rule. Processing is repeatedly performed until the routing tables have not been modified.

Abstract translation: 描述了用于确定在网络中执行路由的多个组件的一组路由信息的技术。 确定直接连接到多个部件中的每一个的目标。 多个组件中的每一个与多个路由表中的一个相关联。 多个路由表中的每一个根据网络中的目的地存储路由信息。 成本信息存储在多个路由表中，用于直接连接到多个组件之一的每个目的地。 对于多个部件中的每一个，确定一组相邻部件。 对于每个相邻分量，根据采用规则从所述每个相邻分量的路由表中采用目的地的路由信息​​。 重复执行处理，直到路由表未被修改为止。

公开(公告)号：US07330956B1

公开(公告)日：2008-02-12

申请号：US10123661

申请日：2002-04-16

Applicant: Steven T. McClure ,  Steven R. Chalmer ,  Brett D. Niver

Inventor： Steven T. McClure ,  Steven R. Chalmer ,  Brett D. Niver

IPC: G06F12/02

CPC classification number: G06F9/5016

Abstract: Managing memory includes subdividing the memory into a first set of blocks corresponding to a first size and a second set of blocks corresponding to a second size that is greater than said first size, in response to a request for an amount of memory that is less than or equal to the first size, providing one of the first set of blocks, and, in response to a request for an amount of memory that is greater than the first size and less than or equal to the second size, providing one of the second set of blocks. Subdividing the memory may also include subdividing the memory into a plurality of sets of blocks, where each particular set contains blocks corresponding to one size that is different from that of blocks not in the particular set. Each set of blocks may correspond to a size that is a multiple of a predetermined value. Managing memory may also include providing a table containing an entry for each set of blocks. The entry for each set of blocks may be a pointer to one of: an unused block and null. Unused blocks of a set may be linked together to form a linked list where the pointer for each entry in the table points to the first block in the list.

公开(公告)号：US07392361B2

公开(公告)日：2008-06-24

申请号：US11049817

申请日：2005-02-03

Applicant: David L. Reese ,  Steven R. Chalmer ,  Steven T. McClure ,  Brett D. Niver

Inventor： David L. Reese ,  Steven R. Chalmer ,  Steven T. McClure ,  Brett D. Niver

IPC: G06F12/00 ,  G06F13/00 ,  G06F13/28 ,  G06F9/00 ,  G06F9/24 ,  G06F15/177 ,  G06F1/24

CPC classification number: G06F9/5016

Abstract: Managing memory includes receiving a request for a memory allocation, determining whether the memory allocation is to be maintained when subsequently initializing memory and saving information about the memory allocation to maintain the memory allocation during subsequently initializing memory. Initializing may be performed as part of special reset mode processing. Special reset mode processing may be performed in response to receiving a reset command. The memory may be shared by a plurality of processing units and the reset command may be issued to reset a first processing unit causing reset of the memory and a second processing unit may use a first allocated memory portion that is maintained when initializing the memory as part of processing for the reset command. Saving may include adding an entry to an allocation list associated with the memory, the entry including a location associated with the memory allocation.

Abstract translation: 管理存储器包括接收对存储器分配的请求，确定随后初始化存储器时是否维持存储器分配并且保存关于存储器分配的信息以在随后的初始化存储器期间维持存储器分配。 可以作为特殊复位模式处理的一部分来执行初始化。 可以响应于接收到复位命令而执行特殊复位模式处理。 存储器可以由多个处理单元共享，并且可以发出复位命令以复位导致存储器复位的第一处理单元，并且第二处理单元可以使用在将存储器初始化时保持的第一分配存储器部分作为部分 的复位命令的处理。 保存可以包括向与存储器相关联的分配列表添加条目，该条目包括与该存储器分配相关联的位置。

公开(公告)号：US07296271B1

公开(公告)日：2007-11-13

申请号：US09605812

申请日：2000-06-28

Applicant: Steven R. Chalmer ,  Steven T. McClure

Inventor： Steven R. Chalmer ,  Steven T. McClure

IPC: G06F9/46 ,  G06F9/40 ,  G06F9/44

CPC classification number: G06F9/4843 ,  G06F9/4484 ,  G06F9/461 ,  G06F9/4812 ,  G06F9/52

Abstract: Disclosed is providing one of a plurality of schedulers for a multitasking system for a processor that includes choosing a particular one of the schedulers, setting a program counter to an address corresponding to code of the particular one of the schedulers, and the processor executing code at an address corresponding to the program counter. Also included may be setting a stack pointer to an address corresponding to stack space for the particular one of the schedulers and the processor using the stack space at the stack pointer after executing code at the address corresponding to the program counter. The system described herein provides a small kernel that can run on a variety of hardware platforms, such as a PowerPC based Symmetrix adapter board used in a Symmetrix data storage device provided by EMC Corporation of Hopkinton, Ma. The core kernel code may be written for the general target platform, such as the PowerPC architecture. Since the PowerPC implementation specific modules are well defined, the system may be quite portable between PowerPC processors (such as the 8260 and 750), and should prove relatively easy to port to any PowerPC based Symmetrix adapter board/CPU combination. The kernel may also be ported to run on other RISC machines (Hitachi SH series) and can be ported to CISC architectures.

Abstract translation: 公开了提供用于处理器的多任务系统的多个调度器之一，其包括选择调度器中的特定一个，将程序计数器设置为对应于特定一个调度器的代码的地址，以及处理器执行代码 与程序计数器对应的地址。 还包括可以在对应于程序计数器的地址上执行代码之后，将堆栈指针设置为对应于特定一个调度器和处理器的堆栈空间的堆栈指针，该处理器使用栈指针处的堆栈空间。 本文所述的系统提供了可以在各种硬件平台上运行的小型内核，例如由马萨诸塞州霍普金顿市EMC公司提供的Symmetrix数据存储设备中使用的基于PowerPC的Symmetrix适配器板。 可以为一般目标平台（如PowerPC架构）编写核心内核代码。 由于PowerPC实现的具体模块定义明确，所以系统可能在PowerPC处理器（如8260和750）之间相当便携，并且应该证明相对容易地连接到任何基于PowerPC的Symmetrix适配器板/ CPU组合。 内核也可以移植到其他RISC机器（Hitachi SH系列）上运行，并可以移植到CISC体系结构中。