公开(公告)号：US5020155A

公开(公告)日：1991-05-28

申请号：US422659

申请日：1989-10-17

Applicant: Robert J. Griffin ,  Steven R. Chalmer

Inventor： Robert J. Griffin ,  Steven R. Chalmer

IPC: H04B10/10

CPC classification number: H04B10/1149

Abstract: Orator units are associated with particular exhibit or guiding locations and provide an audio commentary by the medium of ON and OFF states of electromagnetic radiation. Auditor units are portable units associated with paritcular viewers or users and are adapted to detect the electromagnetic radiation and produce therefrom the audio commentary. The auditor unit may be designed to signal, the orator through ON or OFF states of electromagnetic radiation the request for a commentary. The orator unit may be designed to provide a commentary in response to the auditor request. An orator may be designed to provide a plurality of commentaries on corresponding frequency modulation (FM) channels (which are converted to and from electromagnetic radiation) and the orator and auditor may be designed so that the orator may tune the auditor to demodulate only the FM channel corresponding to the auditor's selected type and time of commentary. A plate encoded with conducting and non-conducting areas may be used to encode an auditor unit to cause it to select the type commentary desired by a viewer or user.

Abstract translation: 演讲者单位与特定展览或指导位置相关联，并通过电磁辐射的ON和OFF状态介质提供音频评论。 审计单位是与专用观众或用户相关联的便携式单元，并且适于检测电磁辐射并从中产生音频评论。 审核单元可以被设计为通过电磁辐射的ON或OFF状态向演讲者发出对评论的请求。 演说单位可以被设计成响应于审核员请求提供评论。 演说者可以被设计成在相应的频率调制（FM）信道（其被转换成和从电磁辐射转换）上提供多个评论，并且演讲者和审核员可以被设计成使得演讲者可以调整审核员以仅解调FM 渠道对应审计师的选定类型和评论时间。 编码有导电和非导电区域的板可以用于对审核单元进行编码，以使其选择观看者或用户所期望的类型评注。

公开(公告)号：US07343432B1

公开(公告)日：2008-03-11

申请号：US10666773

申请日：2003-09-19

Applicant: Brett D. Niver ,  Steven R. Chalmer ,  Steven T. McClure

Inventor： Brett D. Niver ,  Steven R. Chalmer ,  Steven T. McClure

IPC: G06F13/00 ,  G06F13/28 ,  G06F17/30

CPC classification number: G06F9/526

Abstract: Described is a distributed lock processing technique that may be used to coordinate access to globally accessed resource between endpoints using the connecting message fabric. Processors in a data storage system communicate using the message switch of the message fabric. Each processor is an endpoint within a data storage system. Each endpoint, prior to requesting a lock, dynamically determines a current lock owner of the lock to be requested in accordance with a determination of which endpoints are available as lock owners at the current time. The lock request is issued to the current lock owner with a requested time period used by the lock owner to determine an expiration time. The lock expires automatically at the expiration time even if the lock holder becomes unavailable. If the current lock owner becomes unavailable, a new lock owner is determined prior to the next request for that lock.

Abstract translation: 描述了一种分布式锁处理技术，其可用于协调使用连接消息结构的端点之间对全局访问资源的访问。 数据存储系统中的处理器使用消息结构的消息交换进行通信。 每个处理器是数据存储系统中的端点。 在请求锁之前，每个端点根据在当前时间作为锁拥有者可用的哪些端点的确定动态地确定要请求的锁的当前锁拥有者。 锁请求将以锁所有者使用的请求时间段发出给当前锁所有者以确定到期时间。 即使锁定架不可用，锁定也将在到期时自动过期。 如果当前的锁拥有者变得不可用，则在下一次请求该锁之前确定新的锁拥有者。

公开(公告)号：US07136969B1

公开(公告)日：2006-11-14

申请号：US10462949

申请日：2003-06-17

Applicant: Brett D. Niver ,  Steven R. Chalmer ,  Steven T. McClure

Inventor： Brett D. Niver ,  Steven R. Chalmer ,  Steven T. McClure

IPC: G06F12/00

CPC classification number: G06F12/0831 ,  G06F12/0808

Abstract: Described is a technique for maintaining local cache coherency between endpoints using the connecting message fabric. Processors in a data storage system communicate using the message fabric. Each processor is an endpoint having its own local cache storage in which portions of global memory may be locally cached. A write through caching technique is described. Each local cache line of data of each processor is either in an invalid or a shared state. When a write to global memory is performed by a processor (write miss or a write hit), the following are performed atomically: the global memory is updated, other processor's local cache lines of the data are invalidated, verification of invalidation is received by the processor, and the processor's local copy is updated. Other processors' cache lines are invalidated by transmission of an invalidate command by the processor. A processor updates its local cache lines upon the next read miss or write miss of the updated cacheable global memory.

公开(公告)号：US07392361B2

公开(公告)日：2008-06-24

申请号：US11049817

申请日：2005-02-03

Applicant: David L. Reese ,  Steven R. Chalmer ,  Steven T. McClure ,  Brett D. Niver

Inventor： David L. Reese ,  Steven R. Chalmer ,  Steven T. McClure ,  Brett D. Niver

IPC: G06F12/00 ,  G06F13/00 ,  G06F13/28 ,  G06F9/00 ,  G06F9/24 ,  G06F15/177 ,  G06F1/24

CPC classification number: G06F9/5016

Abstract: Managing memory includes receiving a request for a memory allocation, determining whether the memory allocation is to be maintained when subsequently initializing memory and saving information about the memory allocation to maintain the memory allocation during subsequently initializing memory. Initializing may be performed as part of special reset mode processing. Special reset mode processing may be performed in response to receiving a reset command. The memory may be shared by a plurality of processing units and the reset command may be issued to reset a first processing unit causing reset of the memory and a second processing unit may use a first allocated memory portion that is maintained when initializing the memory as part of processing for the reset command. Saving may include adding an entry to an allocation list associated with the memory, the entry including a location associated with the memory allocation.

Abstract translation: 管理存储器包括接收对存储器分配的请求，确定随后初始化存储器时是否维持存储器分配并且保存关于存储器分配的信息以在随后的初始化存储器期间维持存储器分配。 可以作为特殊复位模式处理的一部分来执行初始化。 可以响应于接收到复位命令而执行特殊复位模式处理。 存储器可以由多个处理单元共享，并且可以发出复位命令以复位导致存储器复位的第一处理单元，并且第二处理单元可以使用在将存储器初始化时保持的第一分配存储器部分作为部分 的复位命令的处理。 保存可以包括向与存储器相关联的分配列表添加条目，该条目包括与该存储器分配相关联的位置。

公开(公告)号：US07296271B1

公开(公告)日：2007-11-13

申请号：US09605812

申请日：2000-06-28

Applicant: Steven R. Chalmer ,  Steven T. McClure

Inventor： Steven R. Chalmer ,  Steven T. McClure

IPC: G06F9/46 ,  G06F9/40 ,  G06F9/44

CPC classification number: G06F9/4843 ,  G06F9/4484 ,  G06F9/461 ,  G06F9/4812 ,  G06F9/52

Abstract: Disclosed is providing one of a plurality of schedulers for a multitasking system for a processor that includes choosing a particular one of the schedulers, setting a program counter to an address corresponding to code of the particular one of the schedulers, and the processor executing code at an address corresponding to the program counter. Also included may be setting a stack pointer to an address corresponding to stack space for the particular one of the schedulers and the processor using the stack space at the stack pointer after executing code at the address corresponding to the program counter. The system described herein provides a small kernel that can run on a variety of hardware platforms, such as a PowerPC based Symmetrix adapter board used in a Symmetrix data storage device provided by EMC Corporation of Hopkinton, Ma. The core kernel code may be written for the general target platform, such as the PowerPC architecture. Since the PowerPC implementation specific modules are well defined, the system may be quite portable between PowerPC processors (such as the 8260 and 750), and should prove relatively easy to port to any PowerPC based Symmetrix adapter board/CPU combination. The kernel may also be ported to run on other RISC machines (Hitachi SH series) and can be ported to CISC architectures.

Abstract translation: 公开了提供用于处理器的多任务系统的多个调度器之一，其包括选择调度器中的特定一个，将程序计数器设置为对应于特定一个调度器的代码的地址，以及处理器执行代码 与程序计数器对应的地址。 还包括可以在对应于程序计数器的地址上执行代码之后，将堆栈指针设置为对应于特定一个调度器和处理器的堆栈空间的堆栈指针，该处理器使用栈指针处的堆栈空间。 本文所述的系统提供了可以在各种硬件平台上运行的小型内核，例如由马萨诸塞州霍普金顿市EMC公司提供的Symmetrix数据存储设备中使用的基于PowerPC的Symmetrix适配器板。 可以为一般目标平台（如PowerPC架构）编写核心内核代码。 由于PowerPC实现的具体模块定义明确，所以系统可能在PowerPC处理器（如8260和750）之间相当便携，并且应该证明相对容易地连接到任何基于PowerPC的Symmetrix适配器板/ CPU组合。 内核也可以移植到其他RISC机器（Hitachi SH系列）上运行，并可以移植到CISC体系结构中。

公开(公告)号：US06728962B1

公开(公告)日：2004-04-27

申请号：US09605172

申请日：2000-06-28

Applicant: Steven R. Chalmer ,  Steven T. McClure

Inventor： Steven R. Chalmer ,  Steven T. McClure

IPC: G06F900

CPC classification number: G06F9/4843 ,  G06F9/461 ,  G06F9/4881

Abstract: Disclosed is context swapping in a multitasking operating system for a processor that includes providing a plurality of context blocks for storing context information for a plurality of processes, providing an array of pointers to the context blocks, providing an index to the array of pointers, and swapping context by adjusting at least one pointer in the array of pointers to point to a context block of a new process. Further included may be incrementing the index prior to adjusting the at least one pointer in the array of pointers. Further included may be, after adjusting at least one pointer in the array of pointers, decrementing the index and causing the processor to jump to an address indicated by a program counter value of the new process. The context information may include values for registers, a stack pointer, and a program counter for a process. The system described herein provides a small kernel that can run on a variety of hardware platforms, such as a PowerPC based Symmetrix adapter board used in a Symmetrix data storage device provided by EMC Corporation of Hopkinton, Mass. The core kernel code may be written for the general target platform, such as the PowerPC architecture. Since the PowerPC implementation specific modules are well defined, the system may be quite portable between PowerPC processors (such as the 8260 and 750), and should prove relatively easy to port to any PowerPC based Symmetrix adapter board/CPU combination. The kernel may also be ported to run on other RISC machines (Hitachi SH series) and can be ported to CISC architectures.

Abstract translation: 公开了用于处理器的多任务操作系统中的上下文交换，其包括提供用于存储多个进程的上下文信息的多个上下文块，提供指向上下文块的指针数组，为指针数组提供索引，以及 通过调整指针数组中的至少一个指针来指向新进程的上下文块来交换上下文。 在调整指针数组中的至少一个指针之前，还包括增加索引。 进一步包括在调整指针阵列中的至少一个指针之后，递减索引并使处理器跳转到由新进程的程序计数器值指示的地址。 上下文信息可以包括用于进程的寄存器，堆栈指针和程序计数器的值。 本文所述的系统提供了可在各种硬件平台上运行的小型内核，例如由Mass Corporation（由Hopkinton，Mass）的EMC Corporation提供的Symmetrix数据存储设备中使用的基于PowerPC的Symmetrix适配器板。核心内核代码可能为 一般目标平台，如PowerPC架构。 由于PowerPC实现的具体模块定义明确，所以系统可能在PowerPC处理器（如8260和750）之间相当便携，并且应该证明相对容易地连接到任何基于PowerPC的Symmetrix适配器板/ CPU组合。 内核也可以移植到其他RISC机器（Hitachi SH系列）上运行，并可以移植到CISC架构。

公开(公告)号：US07996848B1

公开(公告)日：2011-08-09

申请号：US11324989

申请日：2006-01-03

Applicant: Steven T. McClure ,  Steven R. Chalmer ,  Brett D. Niver

Inventor： Steven T. McClure ,  Steven R. Chalmer ,  Brett D. Niver

IPC: G06F9/46 ,  G06F7/00 ,  G06F17/00 ,  G06F13/00 ,  G06F12/00

CPC classification number: G06F9/526 ,  G06F9/485

Abstract: In a methods and systems of controlling a process's access to a device driver, a lock may be used to establish a process wait state or to wake up one or more processes. A spinlock may be used to acquire a lock associated with a device driver. The lock includes a lock value representing the availability of the lock. If the lock value is a first value, the process acquires the lock and sets the lock value to a second value. Otherwise, the process returns to the step of using the spinlock to acquire the lock associated with the device driver. If the lock is acquired, the process accesses the device driver. If the device is not ready, the process is set to wait for the lock. Waiting for the lock comprises setting a field of the process to a pointer to the lock and setting a state of the process to waiting. After the device has been successfully accessed or the process has been set to wait for the lock, the lock is released typically by setting the lock value to the first value.

Abstract translation: 在控制进程对设备驱动程序的访问的方法和系统中，可以使用锁来建立进程等待状态或者唤醒一个或多个进程。 自旋锁可用于获取与设备驱动程序相关联的锁定。 该锁包含一个表示锁的可用性的锁值。 如果锁值是第一个值，则该进程获取锁定并将锁定值设置为第二个值。 否则，该过程返回到使用自旋锁来获取与设备驱动程序相关联的锁定的步骤。 如果锁获取，则进程访问设备驱动程序。 如果设备未准备就绪，则该进程被设置为等待锁定。 等待锁包括将进程的一个字段设置为指向该锁的指针，并将进程的状态设置为等待。 设备成功访问或进程已设置为等待锁定后，通常通过将锁定值设置为第一个值来释放锁定。

公开(公告)号：US07810094B1

公开(公告)日：2010-10-05

申请号：US11239776

申请日：2005-09-30

Applicant: Steven T. McClure ,  Steven R. Chalmer ,  Brett D. Niver

Inventor： Steven T. McClure ,  Steven R. Chalmer ,  Brett D. Niver

IPC: G06F9/46

CPC classification number: G06F9/4881 ,  G06F9/526

Abstract: A process scheduling method includes executing a plurality of symmetric schedulers on respective processors of a multiprocessing system. Each scheduler periodically accesses a shared lock to obtain exclusive access to a shared scheduling data structure including (a) process information identifying the processes, and (b) scheduling information reflecting the executability and priorities of the processes. After obtaining the lock, each scheduler performs a scheduling routine including (a) utilizing the scheduling information and a scheduling algorithm to identify a next executable process, and (b) (1) activating the identified process to begin executing on the processor on which the scheduler is executing, and (2) updating the scheduling information to reflect the activation of the identified process. The scheduler then accesses the lock to relinquish exclusive access to the scheduling data structure. The fully symmetric scheduler provides for efficient, high-performance scheduling especially in embedded multiprocessing computer systems in which the rate of process context switches may be several thousand per second.

Abstract translation: 一种过程调度方法包括在多处理系统的各个处理器上执行多个对称调度器。 每个调度器周期性地访问共享锁，以获得对共享调度数据结构的独占访问，包括（a）识别过程的过程信息，以及（b）调度反映过程的可执行性和优先级的信息。 在获得锁定之后，每个调度器执行调度程序，其包括（a）利用调度信息和调度算法来识别下一个可执行过程，以及（b）（1）激活所识别的过程以开始在处理器上执行 调度器正在执行，并且（2）更新调度信息以反映所识别的过程的激活。 调度器然后访问锁以放弃对调度数据结构的独占访问。 完全对称的调度器提供有效的高性能调度，特别是在其中处理上下文切换速率可以是几千个每秒的嵌入式多处理计算机系统中。

公开(公告)号：US07793160B1

公开(公告)日：2010-09-07

申请号：US11091910

申请日：2005-03-29

Applicant: Steven T. McClure ,  Steven R. Chalmer ,  Brett D. Niver

Inventor： Steven T. McClure ,  Steven R. Chalmer ,  Brett D. Niver

IPC: G06F11/00

CPC classification number: G06F11/3636

Abstract: Methods and systems consistent with the present invention may facilitate error tracing in computer software. Such methods and systems may maintain context information of a target process, swap from a context of the target process to a context of an error-tracing process, and trace an error from the target process using the error-tracing process and the context information of the target process.

Abstract translation: 与本发明一致的方法和系统可以促进计算机软件中的错误跟踪。 这样的方法和系统可以维护目标进程的上下文信息，从目标进程的上下文切换到错误跟踪进程的上下文，并且使用错误跟踪进程和目标进程的上下文信息来跟踪来自目标进程的错误 目标进程。

公开(公告)号：US07363431B1

公开(公告)日：2008-04-22

申请号：US10667170

申请日：2003-09-19

Applicant: Brett D. Niver ,  Steven R. Chalmer ,  Steven T. McClure

Inventor： Brett D. Niver ,  Steven R. Chalmer ,  Steven T. McClure

IPC: G06F15/16

CPC classification number: H04L67/1095 ,  Y10S707/99952

Abstract: Described is a synchronization technique that may be used to coordinate processing between endpoints using the connecting message fabric. Processors in a data storage system communicate using the message switch of the message fabric. Each processor is an endpoint within a data storage system. A first endpoint may mark the beginning of the synchronization period by specifying a processing point at which other processors and the first endpoint are to coordinate from the perspective of the first endpoint. Synchronization is performed using local state information about the processing state of each endpoint as reported by each endpoint. The first endpoint waits for successful synchronization within a timeout period in accordance with the first endpoint's local state information. If successful synchronization does not occur prior to the timeout period, the first endpoint broadcasts a message with a new synchronization point to other endpoints. This indicates that the synchronization has failed marking the end of the synchronization period from perspective of the first endpoint.

Abstract translation: 描述了可以用于协调使用连接消息结构的端点之间的处理的同步技术。 数据存储系统中的处理器使用消息结构的消息交换进行通信。 每个处理器是数据存储系统中的端点。 第一端点可以通过指定其他处理器和第一端点从第一端点的角度来协调的处理点来标记同步周期的开始。 使用由每个端点报告的关于每个端点的处理状态的本地状态信息执行同步。 第一个端点根据第一个端点的本地状态信息在超时时间段内等待成功的同步。 如果在超时时间之前未发生成功同步，则第一个端点将具有新同步点的消息广播到其他端点。 这表示从第一个端点的角度看，同步已经不能标记同步周期的结束。