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公开(公告)号：US20130334700A1
公开(公告)日：2013-12-19
申请号：US13526640
申请日：2012-06-19
申请人： Sunil Kumar Singh , Chung-Ju Lee , Tien-I Bao
发明人： Sunil Kumar Singh , Chung-Ju Lee , Tien-I Bao
IPC分类号： H01L23/48 , H01L21/283 , H01L21/768
CPC分类号： H01L21/76808 , H01L21/76807 , H01L21/76814 , H01L21/7682 , H01L21/76831 , H01L21/76835 , H01L21/76877 , H01L21/76879 , H01L21/76885 , H01L23/481 , H01L23/5222 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L2221/1026 , H01L2221/1031 , H01L2221/1036 , H01L2221/1047 , H01L2924/0002 , H01L2924/00
摘要： A method of forming a dual damascene metal interconnect for a semiconductor device. The method includes forming a layer of low-k dielectric, forming vias through the low-k dielectric layer, depositing a sacrificial layer, forming trenches through the sacrificial layer, filling the vias and trenches with metal, removing the sacrificial layer, then depositing an extremely low-k dielectric layer to fill between the trenches. The method allows the formation of an extremely low-k dielectric layer for the second level of the dual damascene structure while avoiding damage to that layer by such processes as trench etching and trench metal deposition. The method has the additional advantage of avoiding an etch stop layer between the via level dielectric and the trench level dielectric.
摘要翻译： 一种形成用于半导体器件的双镶嵌金属互连的方法。 该方法包括形成低k电介质层，通过低k电介质层形成通孔，沉积牺牲层，通过牺牲层形成沟槽，用金属填充通孔和沟槽，去除牺牲层，然后沉积 极低k电介质层填充沟槽之间。 该方法允许形成用于第二级双镶嵌结构的极低k电介质层，同时通过沟槽蚀刻和沟槽金属沉积等工艺避免对该层的损伤。 该方法具有避免通孔级电介质和沟槽级电介质之间的蚀刻停止层的额外优点。
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2.发明申请In-Phase and Quadrature Pattern Alignment for Quadrature Phase Shift Keying Optical Transmitters 有权用于正交相移键控光发射机的同相和正交模式对准公开(公告)号：US20120250793A1
公开(公告)日：2012-10-04
申请号：US13078816
申请日：2011-04-01
CPC分类号： H04L27/364
摘要： I/Q data skew in a QPSK modulator may be detected by sending identical or complementary data streams to I and Q channel PSK modulators, setting the relative carrier phase between I and Q to zero or π, and monitoring the average QPSK output power, where the data streams sent to the I and Q channels include pseudorandom streams of ones and zeroes.
摘要翻译： 可以通过向I和Q通道PSK调制器发送相同或补充的数据流来检测QPSK调制器中的I / Q数据偏移，将I和Q之间的相对载波相位设置为零或pgr，并监视平均QPSK输出功率， 其中发送到I和Q信道的数据流包括1和0的伪随机流。
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3.发明授权Process for the preparation of optically pure isomers of 2-(4-hydroxy phenoxy)-2-methyl-butyric acid methyl ester 失效2-（4-羟基苯氧基）-2-甲基 - 丁酸甲酯的旋光纯异构体的制备方法公开(公告)号：US07230129B2
公开(公告)日：2007-06-12
申请号：US11247490
申请日：2005-10-11
申请人： Potlapally Rejender Kumar , Velagala V. R. M. K. Reddy , Jangalgar Tirupathy Reddy , Gurram Ranga Madhaven , Sunil Kumar Singh
发明人： Potlapally Rejender Kumar , Velagala V. R. M. K. Reddy , Jangalgar Tirupathy Reddy , Gurram Ranga Madhaven , Sunil Kumar Singh
IPC分类号： C07C69/76
CPC分类号： C07C51/412 , C07B2200/07 , C07C51/487 , C07C67/08 , C07C59/68 , C07C69/712
摘要： The invention provides a process for preparing R-(+)-2-(4-hydroxyphenoxy)-2-methyl-butyric acid methyl ester of the formula (I): Various embodiments and variants are provided. The invention also provides a process for preparing S-(−)-2-(4-hydroxyphenoxy)-2-methyl-butyric acid methyl ester of the formula (II) Various embodiments and variants are provided.
摘要翻译： 本发明提供了制备式（I）的R - （+） - 2-（4-羟基苯氧基）-2-甲基 - 丁酸甲酯的方法：提供了各种实施方案和变体。 本发明还提供了制备式（II）的S - （ - ） - 2-（4-羟基苯氧基）-2-甲基 - 丁酸甲酯的方法。提供了各种实施方案和变体。
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公开(公告)号：US08652962B2
公开(公告)日：2014-02-18
申请号：US13526640
申请日：2012-06-19
申请人： Sunil Kumar Singh , Chung-Ju Lee , Tien-I Bao
发明人： Sunil Kumar Singh , Chung-Ju Lee , Tien-I Bao
IPC分类号： H01L21/4763
CPC分类号： H01L21/76808 , H01L21/76807 , H01L21/76814 , H01L21/7682 , H01L21/76831 , H01L21/76835 , H01L21/76877 , H01L21/76879 , H01L21/76885 , H01L23/481 , H01L23/5222 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L2221/1026 , H01L2221/1031 , H01L2221/1036 , H01L2221/1047 , H01L2924/0002 , H01L2924/00
摘要： A method of forming a dual damascene metal interconnect for a semiconductor device. The method includes forming a layer of low-k dielectric, forming vias through the low-k dielectric layer, depositing a sacrificial layer, forming trenches through the sacrificial layer, filling the vias and trenches with metal, removing the sacrificial layer, then depositing an extremely low-k dielectric layer to fill between the trenches. The method allows the formation of an extremely low-k dielectric layer for the second level of the dual damascene structure while avoiding damage to that layer by such processes as trench etching and trench metal deposition. The method has the additional advantage of avoiding an etch stop layer between the via level dielectric and the trench level dielectric.
摘要翻译： 一种形成用于半导体器件的双镶嵌金属互连的方法。 该方法包括形成低k电介质层，通过低k电介质层形成通孔，沉积牺牲层，通过牺牲层形成沟槽，用金属填充通孔和沟槽，去除牺牲层，然后沉积 极低k电介质层填充沟槽之间。 该方法允许形成用于第二级双镶嵌结构的极低k电介质层，同时通过沟槽蚀刻和沟槽金属沉积等工艺避免对该层的损伤。 该方法具有避免通孔级电介质和沟槽级电介质之间的蚀刻停止层的额外优点。
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5.发明授权Alignment of in-phase and quadrature data in quadrature phase shift keying optical transmitters 有权正交相移键控光发射机中的同相和正交数据的对准公开(公告)号：US08644420B2
公开(公告)日：2014-02-04
申请号：US13078733
申请日：2011-04-01
IPC分类号： H04L27/20
CPC分类号： H04L27/364 , H04B10/5053 , H04B10/5057 , H04B10/50577 , H04B10/5561
摘要： I/Q data skew in a QPSK modulator may be detected by sending identical or complementary data streams to I and Q channel PSK modulators, setting the relative carrier phase between I and Q to zero or π, and monitoring the average QPSK output power, where the data streams sent to the I and Q channels include streams of alternating ones and zeroes.
摘要翻译： 可以通过向I和Q通道PSK调制器发送相同或补充的数据流来检测QPSK调制器中的I / Q数据偏移，将I和Q之间的相对载波相位设置为零或pi，并监视平均QPSK输出功率，其中 发送到I和Q信道的数据流包括交替的和零的流。
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6.发明授权公开(公告)号：US08634726B2
公开(公告)日：2014-01-21
申请号：US13471190
申请日：2012-05-14
IPC分类号： H04B10/06
CPC分类号： H04B10/616 , H04J14/06 , H04L27/227 , H04L27/2273 , H04L27/2278
摘要： Digital timing error detection systems and techniques are described. The described techniques are independent of polarization and differential-group-delay and are used to perform timing recovery of polarization-multiplexed coherent optical systems.
摘要翻译： 描述数字定时错误检测系统和技术。 所描述的技术独立于极化和差分组延迟，并且用于执行偏振复用相干光学系统的定时恢复。
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公开(公告)号：US08565621B2
公开(公告)日：2013-10-22
申请号：US13243885
申请日：2011-09-23
IPC分类号： H04B10/00
CPC分类号： H04B10/616 , H04L27/223
摘要： A method for detecting and measuring time skew in high-speed DP-QPSK coherent optical receivers is described.
摘要翻译： 描述了用于检测和测量高速DP-QPSK相干光接收机中的时间偏移的方法。
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8.发明授权In-phase and quadrature pattern alignment for quadrature phase shift keying optical transmitters 有权用于正交相移键控光发射机的同相和正交模式对准公开(公告)号：US08428183B2
公开(公告)日：2013-04-23
申请号：US13078816
申请日：2011-04-01
IPC分类号： H04L27/20
CPC分类号： H04L27/364
摘要： I/Q data skew in a QPSK modulator may be detected by sending identical or complementary data streams to I and Q channel PSK modulators, setting the relative carrier phase between I and Q to zero or π, and monitoring the average QPSK output power, where the data streams sent to the I and Q channels include pseudorandom streams of ones and zeroes.
摘要翻译： 可以通过向I和Q通道PSK调制器发送相同或补充的数据流来检测QPSK调制器中的I / Q数据偏移，将I和Q之间的相对载波相位设置为零或pi，并监视平均QPSK输出功率，其中 发送到I和Q信道的数据流包括1和0的伪随机流。
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公开(公告)号：US07682963B2
公开(公告)日：2010-03-23
申请号：US11867308
申请日：2007-10-04
申请人： Hai-Ching Chen , Sunil Kumar Singh , Tien-I Bao , Shau-Lin Shue , Chen-Hua Yu
发明人： Hai-Ching Chen , Sunil Kumar Singh , Tien-I Bao , Shau-Lin Shue , Chen-Hua Yu
IPC分类号： H01L21/4763
CPC分类号： H01L23/5222 , H01L21/7682 , H01L23/53252 , H01L2924/0002 , H01L2924/00
摘要： The present disclosure provides a method for fabricating an integrated circuit. The method includes forming an energy removable film (ERF) on a substrate; forming a first dielectric layer on the ERF; patterning the ERF and first dielectric layer to form a trench in the ERF and the first dielectric layer; filling a conductive material in the trench; forming a ceiling layer on the first dielectric layer and conductive material filled in the trench; and applying energy to the ERF to form air gaps in the ERF after the forming of the ceiling layer.
摘要翻译： 本公开提供了一种用于制造集成电路的方法。 该方法包括在基板上形成能量可去除膜（ERF）; 在ERF上形成第一介电层; 图案化ERF和第一介电层以在ERF和第一介电层中形成沟槽; 在沟槽中填充导电材料; 在第一介电层上形成顶层和填充在沟槽中的导电材料; 并且在形成天花板层之后，向ERF施加能量以在ERF中形成气隙。
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公开(公告)号：US20090091038A1
公开(公告)日：2009-04-09
申请号：US11867308
申请日：2007-10-04
申请人： Hai-Ching Chen , Sunil Kumar Singh , Tien-I Bao , Shau-Lin Shue , Chen-Hua Yu
发明人： Hai-Ching Chen , Sunil Kumar Singh , Tien-I Bao , Shau-Lin Shue , Chen-Hua Yu
IPC分类号： H01L23/52 , H01L21/4763
CPC分类号： H01L23/5222 , H01L21/7682 , H01L23/53252 , H01L2924/0002 , H01L2924/00
摘要： The present disclosure provides a method for fabricating an integrated circuit. The method includes forming an energy removable film (ERF) on a substrate; forming a first dielectric layer on the ERF; patterning the ERF and first dielectric layer to form a trench in the ERF and the first dielectric layer; filling a conductive material in the trench; forming a ceiling layer on the first dielectric layer and conductive material filled in the trench; and applying energy to the ERF to form air gaps in the ERF after the forming of the ceiling layer.
摘要翻译： 本公开提供了一种用于制造集成电路的方法。 该方法包括在基板上形成能量可去除膜（ERF）; 在ERF上形成第一介电层; 图案化ERF和第一介电层以在ERF和第一介电层中形成沟槽; 在沟槽中填充导电材料; 在第一介电层上形成顶层和填充在沟槽中的导电材料; 并且在形成天花板层之后，向ERF施加能量以在ERF中形成气隙。
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