公开(公告)号：US5115290A

公开(公告)日：1992-05-19

申请号：US577749

申请日：1990-09-05

申请人： Kouji Murakami ,  Taira Matsunaga

发明人： Kouji Murakami ,  Taira Matsunaga

IPC分类号： H01L21/768 ,  H01L21/28 ,  H01L23/522 ,  H01L29/423 ,  H01L29/49 ,  H01L29/78

CPC分类号： H01L29/4975 ,  H01L21/28097 ,  H01L21/28114 ,  H01L29/42376 ,  H01L2924/0002

摘要： A MOS type semiconductor device and a method for the manufacture of the same are disclosed in which a gate electrode is so formed over a semiconductor substrate of a first conductivity type with a gate insulating film formed therebetween as to provide a three-layered structure composed of a first high melting point metal silicide layer formed on the gate insulating film, high melting point metal layer formed on the first high melting point metal silicide and a second high melting point metal silicide layer formed on the high melting point metal layer. In the gate electrode, a length of the first high melting point silicide layer defined in the same direction as that in which a channel region extends is made smaller in length than the high melting point metal layer.

公开(公告)号：US4757276A

公开(公告)日：1988-07-12

申请号：US899592

申请日：1986-08-25

申请人： Tetsuo Ishii ,  Takashi Kimura ,  Taira Matsunaga ,  Mie Nomura ,  Shoichi Tanimata

发明人： Tetsuo Ishii ,  Takashi Kimura ,  Taira Matsunaga ,  Mie Nomura ,  Shoichi Tanimata

IPC分类号： G08C13/00 ,  H03D7/12 ,  H03G1/00 ,  H03G3/00 ,  H03G3/30

CPC分类号： H03D7/12 ,  H03G1/0082

摘要： The signal-processing circuit of the present invention, more particularly the gain-controlled amplifier circuit, comprises a MOSFET (metal oxide semiconductor field-effect transistor), and an NPN bipolar transistor cascade-connected to the MOSFET. The gain-controlled amplifier circuit amplifiers the signal supplied to the gate of the MOSFET, with the gain corresponding to the voltage applied to the base of the NPN bipolar transistor. The circuit can generate an output signal at one end of the emitter-collector path of the NPN bipolar transistor, said output signal containing negligibly small distortion components; in particular, negligible third distortion components.

摘要翻译： 本发明的信号处理电路，特别是增益控制放大器电路，包括MOSFET（金属氧化物半导体场效应晶体管）和级联连接到MOSFET的NPN双极型晶体管。 增益控制放大器电路放大提供给MOSFET栅极的信号，增益对应于施加到NPN双极晶体管基极的电压。 电路可以在NPN双极晶体管的发射极 - 集电极路径的一端产生输出信号，所述输出信号包含可忽略不计的小失真分量; 特别是可忽略的第三失真分量。

公开(公告)号：US5212398A

公开(公告)日：1993-05-18

申请号：US931510

申请日：1992-08-21

申请人： Taira Matsunaga ,  Bunshiro Yamaki

发明人： Taira Matsunaga ,  Bunshiro Yamaki

IPC分类号： H01L27/02

CPC分类号： H01L27/0248 ,  H01L27/0255 ,  H01L2924/0002

摘要： In an integrated circuit device including a bipolar transistor, MOSFET, and protective diode for the MOSFET, all formed over a semiconductor substrate, the protective diode for holding an adequate electrostatic breakdown voltage for a gate oxide layer of the MOSFET is provided by forming a second conductivity type buried area continuous with, and in contact with, a second conductivity type region at a boundary between the first conductivity type semiconductor substrate and a first conductivity type second semiconductor layer. By doing so, a substantive junction depth Xj is made deeper as a whole with respect to the second conductivity type region. It is, therefore, possible to obtain a protective diode of adequate electrostatic breakdown-voltage characteristic which does not adversely affect the operation of the MOSFET even if a relatively thin semiconductor layer is employed. The resultant integrated circuit device equipped with the aforementioned protective diode can reveal an improved high frequency characteristic.

摘要翻译： 在包括用于MOSFET的双极晶体管，MOSFET和用于MOSFET的保护二极管的集成电路器件中，全部形成在半导体衬底上，用于保持用于MOSFET的栅极氧化物层的适当静电击穿电压的保护二极管是通过形成第二 在第一导电型半导体衬底和第一导电类型的第二半导体层之间的边界处与第二导电类型区域连续并接触的导电型掩埋区域。 通过这样做，相对于第二导电类型区域，实质上的结深度Xj整体更深。 因此，即使采用相对薄的半导体层，也可以获得足够的静电击穿电压特性的保护二极管，其不会对MOSFET的操作产生不利影响。 具有上述保护二极管的所得集成电路器件可以显示出改进的高频特性。

公开(公告)号：US5238850A

公开(公告)日：1993-08-24

申请号：US903741

申请日：1992-06-25

申请人： Taira Matsunaga ,  Bunshiro Yamaki

发明人： Taira Matsunaga ,  Bunshiro Yamaki

IPC分类号： H01L21/8249 ,  H01L23/29 ,  H01L27/06

CPC分类号： H01L23/298 ,  H01L21/8249 ,  H01L27/0635 ,  H01L2924/0002 ,  H01L2924/13091

摘要： A Bi-MOS type semiconductor integrated circuit device having at least one bipolar transistor in an island region is provided. The island region is covered with a multilayer insulating film which is formed of a silicon oxide film and a silicon nitride film having a different etching resistance with each other. Collector and base contact holes and an intended emitter contact hole are formed in the multilayer insulating film at the same time to provide bipolar transistors having a fine structure. An insulated gate MOS transistor includes a protective film such as polysilicon film covering a gate insulating film to increase the reliability.

摘要翻译： 提供了一种在岛状区域中具有至少一个双极晶体管的Bi-MOS型半导体集成电路器件。 岛状区域覆盖有由氧化硅膜和具有不同的耐蚀刻性的氮化硅膜形成的多层绝缘膜。 在多层绝缘膜中同时形成集电极和基极接触孔和预期的发射极接触孔，以提供具有精细结构的双极晶体管。 绝缘栅极MOS晶体管包括覆盖栅极绝缘膜的保护膜，例如多晶硅膜，以提高可靠性。

公开(公告)号：US4928157A

公开(公告)日：1990-05-22

申请号：US333370

申请日：1989-04-05

申请人： Taira Matsunaga ,  Takashi Kimura

发明人： Taira Matsunaga ,  Takashi Kimura

IPC分类号： H01L29/78 ,  H01L27/02 ,  H01L29/866

CPC分类号： H01L27/0255

摘要： A protection diode structure for a MOS transistor which includes a semiconductor substrate layer and a gate electrode insulated from the semiconductor substrate layer and in which a driving voltage is applied therebetween to create an inversion layer in an operating mode, includes a first semiconductor layer, a second semiconductor layer formed in the first semiconductor layer and connected to the gate electrode, and a third semiconductor layer formed to surround the first semiconductor layer, uniformly separated from the second layer, and connected to the semiconductor substrate layer, wherein the first and second semiconductor layers constitute a first diode having a breakdown voltage greater than the driving voltage and less than the gate withstand voltage of the MOS transistor, and the first and third semiconductor layers constitute a second diode having a breakdown voltage less than the gate withstand voltage of the MOS transistor. In this protection diode structure, the junction area of the second diode is set larger than that of the first diode by uniformly separating the third semiconductor layer from the second semiconductor layer. The semiconductor substrate layer and first semiconductor layer are formed of a first conductivity type and the second and third semiconductor layers are formed of a second conductivity type. Thus, the first PN junction diode is reversely biased by application of the drive voltage and the second PN junction diode is forwardly biased by application of the drive voltage.

摘要翻译： 一种用于MOS晶体管的保护二极管结构，其包括半导体衬底层和与半导体衬底层绝缘的栅电极，并且其中施加驱动电压以在工作模式中产生反型层，包括第一半导体层， 第二半导体层，形成在第一半导体层中并连接到栅电极;以及第三半导体层，形成为围绕第一半导体层，与第二层均匀分离，并连接到半导体衬底层，其中第一和第二半导体 层构成具有大于驱动电压并小于MOS晶体管的栅极耐受电压的击穿电压的第一二极管，并且第一和第三半导体层构成具有小于MOS的栅极耐受电压的击穿电压的第二二极管 晶体管。 在该保护二极管结构中，通过将第三半导体层与第二半导体层均匀地分离，第二二极管的结面积被设定为大于第一二极管的结面积。 半导体衬底层和第一半导体层由第一导电类型形成，第二和第三半导体层由第二导电类型形成。 因此，通过施加驱动电压，第一PN结二极管被反向偏置，并且通过施加驱动电压而使第二PN结二极管正向偏置。