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公开(公告)号：US08716097B2
公开(公告)日：2014-05-06
申请号：US13584016
申请日：2012-08-13
CPC分类号： H01L21/823892 , H01L21/26513 , H01L27/092 , H01L27/0921 , H01L29/1083 , H01L29/6659 , H01L29/7833
摘要： A Metal-Oxide Semiconductor (MOS) transistor includes a substrate having a topside semiconductor surface doped with a first dopant type having a baseline doping level. A well is formed in the semiconductor surface doped with a second doping type. The well forms a well-substrate junction having a well depletion region. A retrograde doped region is below the well-substrate junction doped with the first dopant type having a peak first dopant concentration of between five (5) and one hundred (100) times above the baseline doping level at a location of the peak first dopant concentration, wherein with zero bias across the well-substrate junction at least (>) ninety (90) % of a total dose of the retrograde doped region is below the bottom of the well depletion region. A gate structure is on the well. Source and drain regions are on opposing sides of the gate structure.
摘要翻译： 金属氧化物半导体（MOS）晶体管包括具有掺杂有具有基线掺杂水平的第一掺杂剂类型的顶侧半导体表面的衬底。 在掺杂有第二掺杂类型的半导体表面中形成阱。 阱形成具有良好耗尽区的良好的衬底结。 逆向掺杂区域在掺杂有第一掺杂剂类型的阱衬底结下方具有在峰值第一掺杂剂浓度的位置处具有高于基线掺杂水平的五（5）和百（100）倍之间的峰值第一掺杂浓度 其中在穿过阱底衬层的零偏压下，逆向掺杂区域的总剂量的至少（>）九十（90）％低于阱耗尽区的底部。 门的结构在井上。 源极和漏极区域在栅极结构的相对侧上。
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2.发明授权公开(公告)号：US07701242B2
公开(公告)日：2010-04-20
申请号：US11932080
申请日：2007-10-31
CPC分类号： G01R31/2844 , G01R31/2851 , G01R31/31723
摘要： An electronic circuit to determine current-voltage characteristics of a plurality of electronic devices under test. The electronic circuit is comprised of a plurality of individual test cells, each of the plurality of test cells is configured to electrically couple to a first terminal of one of the plurality of electronic devices under test and to a first current source. A second terminal of each of the plurality of electronic devices under test couples to a second current source. The circuit employs a current-based measurement method.
摘要翻译： 一种用于确定被测试的多个电子设备的电流 - 电压特性的电子电路。 电子电路由多个单独的测试单元组成，多个测试单元中的每一个被配置为电耦合到被测试的多个电子设备之一的第一端子和第一电流源。 被测试的多个电子设备中的每一个的第二终端耦合到第二电流源。 该电路采用基于电流的测量方法。
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公开(公告)号：US20140042545A1
公开(公告)日：2014-02-13
申请号：US13584016
申请日：2012-08-13
IPC分类号： H01L27/088 , H01L21/336 , H01L29/78
CPC分类号： H01L21/823892 , H01L21/26513 , H01L27/092 , H01L27/0921 , H01L29/1083 , H01L29/6659 , H01L29/7833
摘要： A Metal-Oxide Semiconductor (MOS) transistor includes a substrate having a topside semiconductor surface doped with a first dopant type having a baseline doping level. A well is formed in the semiconductor surface doped with a second doping type. The well forms a well-substrate junction having a well depletion region. A retrograde doped region is below the well-substrate junction doped with the first dopant type having a peak first dopant concentration of between five (5) and one hundred (100) times above the baseline doping level at a location of the peak first dopant concentration, wherein with zero bias across the well-substrate junction at least (>) ninety (90) % of a total dose of the retrograde doped region is below the bottom of the well depletion region. A gate structure is on the well. Source and drain regions are on opposing sides of the gate structure.
摘要翻译： 金属氧化物半导体（MOS）晶体管包括具有掺杂有具有基线掺杂水平的第一掺杂剂类型的顶侧半导体表面的衬底。 在掺杂有第二掺杂类型的半导体表面中形成阱。 阱形成具有良好耗尽区的良好的衬底结。 逆向掺杂区域在掺杂有第一掺杂剂类型的阱衬底结点之下，其峰值第一掺杂剂浓度在峰值第一掺杂剂浓度的位置处的基线掺杂水平的五（5）和百（100）倍之间 其中在穿过阱底衬层的零偏压下，逆向掺杂区域的总剂量的至少（>）九十（90）％低于阱耗尽区的底部。 门的结构在井上。 源极和漏极区域在栅极结构的相对侧上。
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4.发明申请公开(公告)号：US20090108865A1
公开(公告)日：2009-04-30
申请号：US11932080
申请日：2007-10-31
CPC分类号： G01R31/2844 , G01R31/2851 , G01R31/31723
摘要： An electronic circuit to determine current-voltage characteristics of a plurality of electronic devices under test. The electronic circuit is comprised of a plurality of individual test cells, each of the plurality of test cells is configured to electrically couple to a first terminal of one of the plurality of electronic devices under test and to a first current source. A second terminal of each of the plurality of electronic devices under test couples to a second current source. The circuit employs a current-based measurement method.
摘要翻译： 一种用于确定被测试的多个电子设备的电流 - 电压特性的电子电路。 电子电路由多个单独的测试单元组成，多个测试单元中的每一个被配置为电耦合到被测试的多个电子设备之一的第一端子和第一电流源。 被测试的多个电子设备中的每一个的第二终端耦合到第二电流源。 该电路采用基于电流的测量方法。
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公开(公告)号：US07388387B2
公开(公告)日：2008-06-17
申请号：US11619333
申请日：2007-01-03
CPC分类号： G01R27/14
摘要： An electronic circuit and method to determine a resistance value of a resistive element. The circuit includes a current source coupled in series with the resistive element. The current source is configured to force a predetermined value of current through the resistive element and includes a transconducting device coupled to the current source. The transconducting device is configured to sense a voltage across the resistive element and transform the voltage into an output current of the transconducting device such that the output current is not dependent upon any other terminal voltages of the transconducting device.
摘要翻译： 一种用于确定电阻元件的电阻值的电子电路和方法。 电路包括与电阻元件串联耦合的电流源。 电流源被配置为强制通过电阻元件的电流的预定值，并且包括耦合到电流源的跨导器件。 跨导器件被配置为感测电阻元件两端的电压并将电压转换成跨导器件的输出电流，使得输出电流不依赖于跨导器件的任何其它端子电压。
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