公开(公告)号：US5990555A

公开(公告)日：1999-11-23

申请号：US733742

申请日：1996-10-18

申请人： Tatsuya Ohori ,  Tetsurou Hori

发明人： Tatsuya Ohori ,  Tetsurou Hori

IPC分类号： G02F1/1343 ,  G02F1/136 ,  G02F1/1362 ,  G02F1/1368 ,  H01L21/306 ,  H01L21/336 ,  H01L21/768 ,  H01L21/8234 ,  H01L23/498 ,  H01L23/522 ,  H01L23/538 ,  H01L27/088 ,  H01L29/786 ,  H01L29/76 ,  H01L23/48 ,  H01L23/52

CPC分类号： G02F1/13454 ,  G02F1/136227 ,  H01L23/49894 ,  H01L23/5226 ,  H01L23/5383 ,  H01L2924/0002

摘要： An electronic circuit having: a substrate with an upper surface; a lower level wiring made of conductive material and disposed on the substrate; an insulating cover film covering the surface of the lower level wiring; an interlayer insulating film formed on the substrate, covering the insulating cover film; an opening formed through the interlayer insulating film and the insulating cover film at an interlayer contact region extending from an area corresponding to the inside region, as viewed in the in-plane layout of the substrate, of the lower level wiring to an area corresponding to the outside region of the lower level wiring; and a higher level wiring disposed on a partial region of the interlayer insulating film and in the interlayer contact region, the higher level wiring being electrically connected to the lower level wiring in the interlayer contact region. The connection reliability between a lower level wiring layer and a higher level wiring layer in the connection region can be improved while maintaining the insulation reliability therebetween in the insulation region.

摘要翻译： 一种电子电路，具有：具有上表面的基板; 由导电材料制成的下层布线并设置在基板上; 覆盖下层布线的表面的绝缘覆盖膜; 形成在所述基板上的覆盖所述绝缘覆盖膜的层间绝缘膜; 从层间绝缘膜和绝缘覆盖膜形成的开口，在从基板的平面内布局看，从对应于内部区域的区域延伸的层间接触区域处的下层布线到对应于 下层布线的外围区域; 以及设置在层间绝缘膜的部分区域上且在层间接触区域中的较高电平配线，较高电平布线与层间接触区域中的下层布线电连接。 可以在绝缘区域中保持其间的绝缘可靠性的同时，可以提高连接区域中的下层布线层与较高级布线层之间的连接可靠性。