Dual serial-parallel-serial analog memory
    1.
    发明授权
    Dual serial-parallel-serial analog memory 失效
    双串并行串行模拟存储器

    公开(公告)号:US3953837A

    公开(公告)日:1976-04-27

    申请号:US527670

    申请日:1974-11-27

    申请人: Tom F. Cheek, Jr.

    发明人: Tom F. Cheek, Jr.

    IPC分类号: G11C19/28 G11C27/04 G11C11/40

    CPC分类号: G11C27/04 G11C19/287

    摘要: A CCD shift register involves a serial input channel and a serial output channel interconnected by a plurality of parallel channels formed in a semiconductor body with separate arrays of multi electrode sets of phase electrodes overlying the input, parallel and output channels. A summing gate electrode common to all of the parallel channels is adjacent the output channel. Control means actuates the gate to transfer charge packets from each parallel channel into the output channel and clocks the charge packets to the output. Two such shift registers are provided with means to inject time samples of an input signal alternately to the two shift registers and to multiplex the outputs therefrom.

    摘要翻译: CCD移位寄存器涉及串联输入通道和串联输出通道,该多个并行通道形成在半导体主体中,该多个并行通道具有覆盖输入,并行和输出通道的多个相电极组的单独阵列。 所有并行通道共同的求和栅电极与输出通道相邻。 控制装置启动门以将电荷包从每个并行通道传送到输出通道,并将电荷包定时到输出端。 两个这样的移位寄存器被提供有将输入信号的时间采样交替地注入两个移位寄存器并且复用其输出的装置。

    Charge coupled device multiplexer
    2.
    发明授权
    Charge coupled device multiplexer 失效
    电荷耦合器件多路复用器

    公开(公告)号:US3947698A

    公开(公告)日:1976-03-30

    申请号:US398285

    申请日:1973-09-17

    摘要: A charge coupled device analog multiplexer in which a CCD shift register is characterized by an array of sets of phase electrodes. A plurality of charge packet injection input channels lead to an electrode in each of preselected sets in the array. A transfer gate common to all input channels admits charge packets to the array. A clock applies shift voltages to the array to move said charge packets to the multiplexer output where detector means responds to charge packets appearing at the output.

    摘要翻译: 电荷耦合器件模拟多路复用器,其中CCD移位寄存器的特征在于相位电极组的阵列。 多个电荷包注入输入通道导致阵列中的每个预选集合中的电极。 所有输入通道共用的传输门允许将数据包送入阵列。 时钟将移位电压施加到阵列以将所述电荷分组移动到多路复用器输出,其中检测器装置响应出现在输出端的充电分组。