公开(公告)号：US6066891A

公开(公告)日：2000-05-23

申请号：US802214

申请日：1997-02-19

申请人： Tooru Yamaoka ,  Atsushi Komura ,  Takeshi Yamauchi ,  Yoshihiko Isobe ,  Hiroyuki Yamane

发明人： Tooru Yamaoka ,  Atsushi Komura ,  Takeshi Yamauchi ,  Yoshihiko Isobe ,  Hiroyuki Yamane

IPC分类号： H01L21/285 ,  H01L21/768 ,  H01L29/45 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/76867 ,  H01L21/28518 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76858 ,  H01L23/53223 ,  H01L29/456 ,  H01L2924/0002

摘要： The purpose of the present invention is to obtain an electrode wiring structure for semiconductor devices that can suppress the occurrence of Al voids inside aluminum alloy wiring without regard to the orientation of such aluminum alloy wiring. An interlayer insulator film 11, a titanium layer 12, a titanium nitride layer 13 that serves as the barrier layer, an aluminum alloy wiring layer 15 and a protective film 18 are formed on top of the silicon substrate 10 to compose the electrode structure. In this case, a distortion relaxation layer 14, with a film thickness of approximately over 10 nm and which is an intermetallic compound that includes aluminum and titanium in its composition, is formed in between the titanium nitride layer 13 and the aluminum alloy wiring layer 15. Because of this distortion relaxation layer, for every wiring width of 1 .mu.m, the number of Al voids with widths of over 0.3 .mu.m is practically reduced to 0.

摘要翻译： 本发明的目的是为了获得能够抑制铝合金布线内的Al空隙的出现而不考虑这种铝合金布线的取向的半导体器件的电极布线结构。 在硅衬底10的顶部上形成层间绝缘膜11，钛层12，用作阻挡层的氮化钛层13，铝合金布线层15和保护膜18，以构成电极结构。 在这种情况下，在氮化钛层13和铝合金布线层15之间形成膜厚约为10nm以上的构成铝和钛的金属间化合物的失真弛豫层14 由于这种失真弛豫层，对于1μm的每个布线宽度，宽度大于0.3μm的Al空隙的数量实际上减少到0。

公开(公告)号：US5592004A

公开(公告)日：1997-01-07

申请号：US534976

申请日：1995-09-28

申请人： Muneo Tamura ,  Takeshi Yamauchi ,  Katuhide Niwa ,  Takeshi Fukazawa ,  Akira Kuroyanagi ,  Tooru Yamaoka

发明人： Muneo Tamura ,  Takeshi Yamauchi ,  Katuhide Niwa ,  Takeshi Fukazawa ,  Akira Kuroyanagi ,  Tooru Yamaoka

IPC分类号： H01L21/8247 ,  C23C16/34 ,  H01L21/314 ,  H01L21/318 ,  H01L23/31 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  H01L29/06 ,  H01L29/78

CPC分类号： C23C16/347 ,  H01L21/3185 ,  H01L23/3171 ,  H01L2924/0002

摘要： A semiconductor device includes a semiconductor element. A silicon nitride film covers the semiconductor element. The silicon nitride film is made of Si.sub.X N.sub.Y H.sub.Z, where X, Y, and Z denote atomic fractions of Si, N, and H respectively. The silicon nitride film relates to an optical absorption edge wavelength shorter than 254 nm. A mean area of regions surrounded by crystal-like grain boundaries at a surface of the silicon nitride film is equal to 4.5.times.10.sup.4 nm.sup.2 or more. The semiconductor element may include a memory element from which information can be erased by exposure to ultraviolet rays.

摘要翻译： 半导体器件包括半导体元件。 氮化硅膜覆盖半导体元件。 氮化硅膜由SiXNYHZ制成，其中X，Y和Z分别表示Si，N和H的原子级分。 氮化硅膜涉及短于254nm的光吸收边缘波长。 在氮化硅膜表面的晶状晶界包围的区域的平均面积为4.5×10 4 nm 2以上。 半导体元件可以包括可通过暴露于紫外线而从其中擦除信息的存储元件。

公开(公告)号：US06348735B1

公开(公告)日：2002-02-19

申请号：US09482895

申请日：2000-01-14

申请人： Tooru Yamaoka ,  Atsushi Komura ,  Takeshi Yamauchi ,  Yoshihiko Isobe ,  Hiroyuki Yamane

发明人： Tooru Yamaoka ,  Atsushi Komura ,  Takeshi Yamauchi ,  Yoshihiko Isobe ,  Hiroyuki Yamane

IPC分类号： H01L2348

CPC分类号： H01L21/76867 ,  H01L21/28518 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76858 ,  H01L23/53223 ,  H01L29/456 ,  H01L2924/0002 ,  H01L2924/00

摘要： The purpose of the present invention is to obtain an electrode wiring structure for semiconductor devices that can suppress the occurrence of Al voids inside aluminum alloy wiring without regard to the orientation of such aluminum alloy wiring. An interlayer insulator film 11, a titanium layer 12, a titanium nitride layer 13 that serves as the barrier layer, an aluminum alloy wiring layer 15 and a protective film 18 are formed on top of the silicon substrate 10 to compose the electrode structure. In this case, a distortion relaxation layer 14, with a film thickness of approximately over 10 nm and which is an intermetallic compound that includes aluminum and titanium in its composition, is formed in between the titanium nitride layer 13 and the aluminum alloy wiring layer 15. Because of this distortion relaxation layer, for every wiring width of 1 &mgr;m, the number of Al voids with widths of over 0.3 &mgr;m is practically reduced to 0.

摘要翻译： 本发明的目的是为了获得能够抑制铝合金布线内的Al空隙的出现而不考虑这种铝合金布线的取向的半导体器件的电极布线结构。 在硅衬底10的顶部上形成层间绝缘膜11，钛层12，用作阻挡层的氮化钛层13，铝合金布线层15和保护膜18，以构成电极结构。 在这种情况下，在氮化钛层13和铝合金布线层15之间形成膜厚约为10nm以上的构成铝和钛的金属间化合物的失真弛豫层14 由于该失真弛豫层，对于1mum的每个布线宽度，宽度大于0.3μm的Al空隙的数量实际上减小到0。

公开(公告)号：US5018001A

公开(公告)日：1991-05-21

申请号：US442669

申请日：1989-11-29

申请人： Kenji Kondo ,  Kazuo Akamatsu ,  Takeshi Yamauchi ,  Tooru Yamaoka ,  Atsushi Komura

发明人： Kenji Kondo ,  Kazuo Akamatsu ,  Takeshi Yamauchi ,  Tooru Yamaoka ,  Atsushi Komura

IPC分类号： H01L23/52 ,  H01L21/28 ,  H01L21/285 ,  H01L21/3205 ,  H01L23/532

CPC分类号： H01L23/53223 ,  H01L23/53219 ,  H01L2924/0002

摘要： An aluminum line including nitrogen formed as a film in a semiconductor integrated circuit is disclosed. Each crystal grain size of the aluminum line is lower than or equal to 0.3 .mu.m to suppress electromigration. A method of forming the aluminum line which can supress electromigration is also disclosed. The amount of an inert gas Q and the amount of a nitrogen gas Q.sub.N are controlled to satisfy "2.ltoreq.(Q.sub.N /Q).times.100.ltoreq.10".

摘要翻译： 公开了一种包括在半导体集成电路中形成为膜的氮的铝线。 铝线的每个晶粒尺寸小于或等于0.3μm以抑制电迁移。 还公开了一种能够抑制电迁移的铝线的形成方法。 控制惰性气体量Q和氮气量QN以满足“2 <=（QN / Q）×100