Parallel processor system including a cache memory subsystem that has
independently addressable local and remote data areas
    1.
    发明授权
    Parallel processor system including a cache memory subsystem that has independently addressable local and remote data areas 失效
    并行处理器系统包括具有可独立寻址的本地和远程数据区的高速缓存存储器子系统

    公开(公告)号:US5778429A

    公开(公告)日:1998-07-07

    申请号:US497751

    申请日:1995-07-03

    IPC分类号: G06F15/17 G06F12/08 G06F12/00

    摘要: A parallel processor system controls access to a distributed shared memory and to plural cache memories to prevent frequently-used local data from being flushed out of a cache memory. The parallel processor system includes a plurality of nodes each including a processor and a shared memory in a distributed shared memory arrangement, and a local-remote divided cache memory system, wherein local data and remote data are controlled separately. Each local-remote divided cache memory system includes a local data area, a remote data area, and a cache memory controller by which either the local data area or the remote data area is accessed according to the contents of an access request.

    摘要翻译: 并行处理器系统控制对分布式共享存储器和多个高速缓冲存储器的访问,以防止频繁使用的本地数据被从高速缓冲存储器中冲出。 并行处理器系统包括多个节点,每个节点包括分布式共享存储器布置中的处理器和共享存储器,以及本地远程分割高速缓存存储器系统,其中本地数据和远程数据被单独控制。 每个本地远程分割高速缓冲存储器系统包括根据访问请求的内容访问本地数据区域或远程数据区域的本地数据区域,远程数据区域和高速缓存存储器控制器。

    Parallel processor system including a cache memory subsystem that has independently addressable local and remote data areas
    2.
    发明授权
    Parallel processor system including a cache memory subsystem that has independently addressable local and remote data areas 失效
    并行处理器系统包括具有可独立寻址的本地和远程数据区的高速缓存存储器子系统

    公开(公告)号:US06295579B1

    公开(公告)日:2001-09-25

    申请号:US09070851

    申请日:1998-05-01

    IPC分类号: G06F1200

    摘要: A parallel processor system controls access to a distributed shared memory and to plural cache memories to prevent frequently-used local data from being flushed out of a cache memory. The parallel processor system includes a plurality of nodes each including a processor and a shared memory in a distributed shared memory arrangement, and a local-remote divided cache memory system, wherein local data and remote data are controlled separately. Each local-remote divided cache memory system includes a local data area, a remote data area, and a cache memory controller by which either the local data area or the remote data area is accessed according to the contents of an access request.

    摘要翻译: 并行处理器系统控制对分布式共享存储器和多个高速缓冲存储器的访问,以防止频繁使用的本地数据被从高速缓冲存储器中冲出。 并行处理器系统包括多个节点,每个节点包括分布式共享存储器布置中的处理器和共享存储器,以及本地远程分割高速缓存存储器系统,其中本地数据和远程数据被单独控制。 每个本地远程分割高速缓冲存储器系统包括根据访问请求的内容访问本地数据区域或远程数据区域的本地数据区域,远程数据区域和高速缓存存储器控制器。