SYSTEM FOR MIGRATING STASH TRANSACTIONS
    1.
    发明申请
    SYSTEM FOR MIGRATING STASH TRANSACTIONS 有权
    移动交易系统

    公开(公告)号:US20160004654A1

    公开(公告)日:2016-01-07

    申请号:US14324233

    申请日:2014-07-06

    IPC分类号: G06F13/28 G06F13/42

    摘要: A system for migrating stash transactions includes first and second cores, an input/output memory management unit (IOMMU), an IOMMU mapping table, an input/output (I/O) device, a stash transaction migration management unit (STMMU), a queue manager and an operating system (OS) scheduler. The I/O device generates a first stash transaction request for a first data frame. The queue manager stores the first stash transaction request. When the first core executes a first thread, the queue manager stashes the first data frame to the first core by way of the IOMMU. The OS scheduler migrates the first thread from the first core to the second core and generates pre-empt notifiers. The STMMU uses the pre-empt notifiers to update the IOMMU mapping table and generate a stash replay command. The queue manager receives the stash replay command and stashes the first data frame to the second core.

    摘要翻译: 用于迁移存储交易的系统包括第一和第二内核,输入/输出存储器管理单元(IOMMU),IOMMU映射表,输入/输出(I / O)设备,存储交易迁移管理单元(STMMU), 队列管理器和操作系统(OS)调度程序。 I / O设备为第一数据帧生成第一个存储交易请求。 队列管理器存储第一个隐藏事务请求。 当第一个核心执行第一个线程时,队列管理器通过IOMMU将第一个数据帧锁定到第一个内核。 OS调度程序将第一个线程从第一个内核迁移到第二个内核并生成预先通过的通知程序。 STMMU使用预先通过的通知程序来更新IOMMU映射表并生成一个存储重放命令。 队列管理器接收收件重播命令并将第一个数据帧封锁到第二个核心。

    System and method for dynamically migrating stash transactions
    4.
    发明授权
    System and method for dynamically migrating stash transactions 有权
    动态迁移隐藏事务的系统和方法

    公开(公告)号:US08671232B1

    公开(公告)日:2014-03-11

    申请号:US13789661

    申请日:2013-03-07

    IPC分类号: G06F3/00 G06F13/14

    CPC分类号: G06F12/1081 G06F13/28

    摘要: A system and method for dynamically migrating stash transactions include first and second processing cores, an input/output memory management unit (IOMMU), an IOMMU mapping table, an input/output (I/O) device, a stash transaction migration management unit (STMMU), and an operating system (OS) scheduler. The first core executes a first thread associated with a frame manager. The OS scheduler migrates the first thread from the first core to the second core and generates pre-empt notifiers to indicate scheduling-out and scheduling-in of the first thread from the first core and to the second core. The STMMU uses the pre-empt notifiers to enable dynamic stash transaction migration.

    摘要翻译: 用于动态迁移存储交易的系统和方法包括第一和第二处理核心,输入/输出存储器管理单元(IOMMU),IOMMU映射表,输入/输出(I / O)设备,存储交易迁移管理单元 STMMU)和操作系统(OS)调度程序。 第一个核心执行与帧管理器相关联的第一个线程。 OS调度程序将第一个线程从第一个核心迁移到第二个核心,并生成预先通过的通知程序,以指示第一个线程从第一个核心到第二个核心的排除和调度。 STMMU使用先进的通知器来启用动态隐藏事务迁移。

    System for migrating stash transactions

    公开(公告)号:US09632958B2

    公开(公告)日:2017-04-25

    申请号:US14324233

    申请日:2014-07-06

    摘要: A system for migrating stash transactions includes first and second cores, an input/output memory management unit (IOMMU), an IOMMU mapping table, an input/output (I/O) device, a stash transaction migration management unit (STMMU), a queue manager and an operating system (OS) scheduler. The I/O device generates a first stash transaction request for a first data frame. The queue manager stores the first stash transaction request. When the first core executes a first thread, the queue manager stashes the first data frame to the first core by way of the IOMMU. The OS scheduler migrates the first thread from the first core to the second core and generates pre-empt notifiers. The STMMU uses the pre-empt notifiers to update the IOMMU mapping table and generate a stash replay command. The queue manager receives the stash replay command and stashes the first data frame to the second core.

    SYSTEM AND METHOD FOR ATOMICALLY UPDATING SHARED MEMORY IN MULTIPROCESSOR SYSTEM
    8.
    发明申请
    SYSTEM AND METHOD FOR ATOMICALLY UPDATING SHARED MEMORY IN MULTIPROCESSOR SYSTEM 审中-公开
    用于在多处理器系统中原形更新共享存储器的系统和方法

    公开(公告)号:US20150012711A1

    公开(公告)日:2015-01-08

    申请号:US13935550

    申请日:2013-07-04

    IPC分类号: G06F12/08

    CPC分类号: G06F12/084

    摘要: A system for operating a shared memory of a multiprocessor system includes a set of processor cores and a corresponding set of core local caches, a set of I/O devices and a corresponding set of I/O device local caches. Read and write operations performed on a core local cache, an I/O device local cache, and the shared memory are governed by a cache coherence protocol (CCP) that ensures that the shared memory is updated atomically.

    摘要翻译: 用于操作多处理器系统的共享存储器的系统包括一组处理器核心和相应的一组核心本地高速缓存,一组I / O设备和相应的一组I / O设备本地高速缓存。 在本地高速缓存,I / O设备本地缓存和共享存储器上执行的读写操作由缓存一致性协议(CCP)来管理,该协议确保共享存储器以原子方式更新。