Multicode receiver
    1.
    发明授权
    Multicode receiver 有权
    多码接收机

    公开(公告)号:US07313166B2

    公开(公告)日:2007-12-25

    申请号:US11336500

    申请日:2006-01-20

    申请人: Wayne H. Bradley

    发明人: Wayne H. Bradley

    IPC分类号: H04B1/69 H04B1/707

    摘要: A code division multiple access (CDMA) receiver detects, de-scrambles, and de-spreads multiple channels that utilize different binary codes. The processing that is common to all channels can be performed once thus saving gate count and power consumption.

    摘要翻译: 码分多址(CDMA)接收机检测,去交织和解扩多个使用不同二进制码的信道。 可以执行所有通道共同处理一次,从而节省门数和功耗。

    Signal detection using a CDMA receiver

    公开(公告)号:US06996158B2

    公开(公告)日:2006-02-07

    申请号:US09791950

    申请日:2001-02-22

    申请人: Wayne H. Bradley

    发明人: Wayne H. Bradley

    IPC分类号: H04B1/69 H04B1/707 H04B1/713

    摘要: A code division multiple access (CDMA) receiver detects the presence of differently formatted signals (e.g., global system for mobile communications (GSM) signals) by programming a CDMA searcher co-processor, which includes a digital filter, with tap weights that correlate with a known sequence within the differently formatted signals. If the tap weights correlate to a received signal, the receiver produces an indication that a differently formatted signal is present. Once differently formatted signals are detected, specific hardware and/or software may be implemented to receive and process the differently formatted signals.

    Blind rate determination
    3.
    发明授权
    Blind rate determination 失效
    盲目率确定

    公开(公告)号:US06810078B2

    公开(公告)日:2004-10-26

    申请号:US09733670

    申请日:2000-12-08

    申请人: Wayne H. Bradley

    发明人: Wayne H. Bradley

    IPC分类号: H03M1300

    摘要: A blind rate determination system generates syndromes for a received symbol stream and, based on the syndromes, calculates a confidence metric associated with possible data rates. The confidence metrics are compared to one another and to a threshold and the data rate associated with the best confidence metric is selected as the data rate at which the symbol stream was encoded.

    摘要翻译: 盲率确定系统为接收的符号流生成校正子,并且基于该校正子计算与可能的数据速率相关联的置信度量度。 将置信度量度彼此进行比较并将其与阈值进行比较,并将与最佳置信量度相关联的数据速率选择为符号流被编码的数据速率。

    Receiver having equalizing demodulator and a non-equalizing demodulator and method for controlling the same
    4.
    发明授权
    Receiver having equalizing demodulator and a non-equalizing demodulator and method for controlling the same 失效
    具有均衡解调器和不均衡解调器的接收机及其控制方法

    公开(公告)号:US07065136B1

    公开(公告)日:2006-06-20

    申请号:US09716501

    申请日:2000-11-20

    IPC分类号: H03H7/30

    摘要: A receiver (24) comprises a non-equalizing demodulator (48), an equalizing demodulator (46) and an output control selector (50). The non-equalizing demodulator (48) receives a modulated signal (44) and demodulates the modulated signal (44) to produce a first digital bit stream (54). The equalizing demodulator (46) receives the modulated signal (44) and equalizes and demodulates the modulated signal (44) to produce a second digital bit stream (52). The output control selector (50), coupled to the non-equalizing demodulator (48) and the equalizing demodulator (46), selectively delivers a first one of the first digital bit stream (54) and the second digital bit stream (52) for at least a predetermined period of time (30) before selectively delivering a second one of the first digital bit stream (54) and the second digital bit stream (52) responsive to a predetermined decision criterion (e.g., bit error rate 68). The first one of the first digital bit stream (54) and the second digital bit stream (52) is different from the second one of the first digital bit stream (54) and the second digital bit stream (52).

    摘要翻译: 接收器(24)包括非均衡解调器(48),均衡解调器(46)和输出控制选择器(50)。 非均衡解调器(48)接收调制信号(44)并解调调制信号(44)以产生第一数字比特流(54)。 均衡解调器(46)接收调制信号(44)并对调制信号(44)进行均衡和解调以产生第二数字比特流(52)。 耦合到非均衡解调器(48)和均衡解调器(46)的输出控制选择器(50)选择性地传送第一数字比特流(54)和第二数字比特流(52)中的第一数字比特流 至少预定的时间段(30),在响应于预定的判定标准(例如,误码率68)选择性地传送第一数字比特流(54)和第二数字比特流(52)中的第二数字比特流(52)之前的第二数字比特流。 第一数字比特流(54)和第二数字比特流(52)中的第一数字比特流(52)与第一数字比特流(54)和第二数字比特流(52)中的第二数字比特流不同。

    Gradient directional microphone system and method therefor
    5.
    发明授权
    Gradient directional microphone system and method therefor 失效
    梯度定向麦克风系统及其方法

    公开(公告)号:US5463694A

    公开(公告)日:1995-10-31

    申请号:US143609

    申请日:1993-11-01

    IPC分类号: H04R3/00 H04R1/40

    摘要: A gradient directional microphone system (100) and method therefor includes no more than three microphones (101, 103, 105) and a processor (107). Each of the microphones (101, 103, 105) have substantially the same gradient order (135, 137, 139) and frequency response. Each microphone produces an electrical signal (109, 111, 113) that is responsive to sound pressure (119, 121, 123) at each microphone (101, 103, 105). The processor (107) is coupled to receive the electrical signal (109, 111, 113) from each microphone (101,103, 105), and operative to produce an output signal (131) for the gradient directional microphone system (100) having a gradient order (141) at least two gradient orders higher than the gradient order (135, 137, 139) of each of the microphones (101, 103, 105). Using the present invention, the size and complexity of the gradient directional microphone system (100) is substantially reduced over that of the prior art.

    摘要翻译: 梯度定向麦克风系统(100)及其方法包括不超过三个麦克风(101,103,105)和处理器(107)。 每个麦克风(101,103,105)具有基本上相同的梯度顺序(135,137,139)和频率响应。 每个麦克风产生响应每个麦克风(101,103,105)处的声压(119,121,123)的电信号(109,111,113)。 处理器(107)被耦合以从每个麦克风(101,103,105)接收电信号(109,111,113),并且可操作以产生用于具有梯度的梯度定向麦克风系统(100)的输出信号(131) 顺序(141)至少两个梯度顺序高于每个麦克风(101,103,105)的梯度顺序(135,137,139)。 使用本发明,梯度定向麦克风系统(100)的尺寸和复杂性比现有技术的大大降低。

    Receiver having gain control and narrowband interference detection
    6.
    发明授权
    Receiver having gain control and narrowband interference detection 有权
    接收机具有增益控制和窄带干扰检测

    公开(公告)号:US06804501B1

    公开(公告)日:2004-10-12

    申请号:US09669015

    申请日:2000-09-25

    IPC分类号: H04B1702

    摘要: A receiver generates two metrics, one that is used to control the gain of an amplifier and the other that is used to determine the presence of narrowband interference, such as IMD. The two metrics may represent analog-to-digital converter (A/D) saturation and average signal strength, either of which may be used to control gain or to detect the presence of narrowband interference.

    摘要翻译: 接收机产生两个度量,一个用于控制放大器的增益,另一个用于确定窄带干扰的存在,如IMD。 两个度量可以表示模数转换器(A / D)饱和度和平均信号强度,其中任一个可以用于控制增益或检测窄带干扰的存在。

    Frame synchronizer
    7.
    发明授权
    Frame synchronizer 有权
    帧同步器

    公开(公告)号:US06483885B1

    公开(公告)日:2002-11-19

    申请号:US09390007

    申请日:1999-09-03

    IPC分类号: H04L700

    CPC分类号: H04J3/0608

    摘要: A frame synchronizer for use in a receiver that receives an encoded signal from a transmitter includes a conjugation unit, a delay unit and multiplier coupled together to process the encoded signal. The multiplier multiplies either the received encoded signal by a conjugated, delayed version of the received encoded signal or multiplies a conjugated version of the received encoded signal by a delayed version of the received encoded signal to produce a first product signal. A further multiplier multiplies the first product signal with a locally-stored signal to generate a second product signal. An accumulator accumulates the second product signal over a plurality of bit times to generate an accumulated signal having a magnitude representing a time synchronization offset between the receiver and the transmitter and phase representing a frequency synchronization offset between the receiver and the transmitter. A synchronization correction unit generates a time offset correction and a frequency offset correction from the accumulated signal and these corrections are used to correct offsets between the receiver and the transmitter.

    摘要翻译: 用于从发射机接收编码信号的接收机中的帧同步器包括耦合在一起以处理编码信号的共轭单元,延迟单元和乘法器。 乘法器将接收到的编码信号乘以接收编码信号的共轭延迟版本,或将接收到的编码信号的共轭版本乘以接收编码信号的延迟版本,以产生第一乘积信号。 另外的乘法器将第一乘积信号与本地存储的信号相乘以产生第二乘积信号。 累加器在多个比特时间累积第二乘积信号,以产生具有表示接收机与发射机之间的时间同步偏移的幅度的累积信号,以及表示接收机与发射机之间的频率同步偏移的相位。 同步校正单元从积累的信号产生时间偏移校正和频率偏移校正,并且这些校正被用于校正接收机和发射机之间的偏移。

    Apparatus and method for providing a baseband digital error signal in an
adaptive predistorter
    8.
    发明授权
    Apparatus and method for providing a baseband digital error signal in an adaptive predistorter 失效
    在自适应预失真器中提供基带数字误差信号的装置和方法

    公开(公告)号:US5486789A

    公开(公告)日:1996-01-23

    申请号:US395259

    申请日:1995-02-28

    IPC分类号: H03F1/32 H04B1/04

    摘要: The present invention provides an apparatus (200) and method (500) for providing a baseband digital error signal in an adaptive predistorter. A carrier cancellation circuit (202) provides a difference (212) between a first signal (208) based on an amplifier output and second signal (210) based on a data input. A quadrature demodulator (204) provides a baseband analog error signal (214) based on the difference (212). An analog-to-digital converter (206) provides the baseband digital error signal (216) based on the baseband analog error signal (214).

    摘要翻译: 本发明提供一种用于在自适应预失真器中提供基带数字误差信号的装置(200)和方法(500)。 载波消除电路(202)基于数据输入提供基于放大器输出的第一信号(208)和第二信号(210)之间的差(212)。 正交解调器(204)基于差值(212)提供基带模拟误差信号(214)。 模数转换器(206)基于基带模拟误差信号(214)提供基带数字误差信号(216)。

    Digital filter having an upsampler operational at a fractional clock rate
    9.
    发明授权
    Digital filter having an upsampler operational at a fractional clock rate 有权
    具有以小数时钟速率操作的上采样器的数字滤波器

    公开(公告)号:US06738420B1

    公开(公告)日:2004-05-18

    申请号:US09624684

    申请日:2000-07-24

    申请人: Wayne H. Bradley

    发明人: Wayne H. Bradley

    IPC分类号: H03H730

    CPC分类号: H03H17/0219 H03H17/0621

    摘要: A digital filter includes a number of coefficient generators that are clocked by a clock having a frequency including an undesired component. The coefficient generators, which each have a number of states, are communicatively coupled to multipliers that receive incoming signals and multiply the incoming signals by coefficients produced by the coefficient generators. Based on the magnitude of the undesired coefficient, certain states of the coefficient generators may be repeated or skipped to adjust the time and frequency domain of the output from the digital filter.

    摘要翻译: 数字滤波器包括由具有包括不期望分量的频率的时钟计时的多个系数发生器。 每个具有多个状态的系数发生器通信地耦合到接收输入信号的乘法器,并将输入信号乘以系数发生器产生的系数。 基于不需要的系数的大小,可以重复或跳过系数发生器的某些状态以调整来自数字滤波器的输出的时间和频域。

    Multicode receiver
    10.
    发明授权

    公开(公告)号:US07016398B2

    公开(公告)日:2006-03-21

    申请号:US09882190

    申请日:2001-06-15

    申请人: Wayne H. Bradley

    发明人: Wayne H. Bradley

    IPC分类号: H04B1/69 H04B1/707

    摘要: A code division multiple access (CDMA) receiver detects, de-scrambles, and de-spreads multiple channels that utilize different binary codes. The processing that is common to all channels can be performed once thus saving gate count and power consumption.